diff options
| author | Yu-ting Shen <[email protected]> | 2020-02-07 15:19:31 +0800 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2020-02-25 11:10:08 -0500 |
| commit | cab5dec425f19f3d4eeca0d8e073578cbed66d8d (patch) | |
| tree | fde65b894009996b7a244bd03c449e43967b0b8b /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | e2c9529f00419dd4d4c8b62defeb3300eee683f2 (diff) | |
drm/amd/display: limit display clock to 100MHz to avoid FIFO error
[Why]
when changing display clock, SMU need to use power up DFS and use
DENTIST to ramp DFS DID to switch target frequency before switching back
to bypass.
[How]
fixed the minimum display clock to 100MHz, it's W/A the same with PCO.
Signed-off-by: Yu-ting Shen <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Acked-by: Harry Wentland <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions