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authorVivien Didelot <[email protected]>2016-05-09 13:22:39 -0400
committerDavid S. Miller <[email protected]>2016-05-09 14:26:08 -0400
commit8c9983a2249269f9b0f22bf070bf856ec1ff58d7 (patch)
treea242438f9979a8ef5ffbcc9ab1de05ae2e76f22e /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
parentb5058d7a308035233db18032edc17135cb17ae27 (diff)
net: dsa: mv88e6xxx: factorize PHY access with PPU
Add a MV88E6XXX_FLAG_PPU flag to describe switch models with a PHY Polling Unit. This allows to merge PPU specific PHY access code in the share code. Make the mv88e6xxx_ppu_disable and mv88e6xxx_phy_{read,write}_ppu functions use unlocked register accesses in order to call them in mv88e6xxx_phy_{read,write} in a locked context. Since the PPU code is shared, also remove NET_DSA_MV88E6XXX_NEED_PPU. Signed-off-by: Vivien Didelot <[email protected]> Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
0 files changed, 0 insertions, 0 deletions