diff options
author | Suravee Suthikulpanit <[email protected]> | 2022-05-19 05:27:01 -0500 |
---|---|---|
committer | Paolo Bonzini <[email protected]> | 2022-06-24 12:50:17 -0400 |
commit | 05c4fe8c1bd94c6f59a8b82cbd535b1aea55945f (patch) | |
tree | 57932a561d09dde2f543e1db592ea95b12d45544 /arch/x86/kvm/svm/svm.c | |
parent | 8fc9c7a3079e2d2e72dfb2f4e9bb2b1fc67f0ee6 (diff) |
KVM: SVM: Refresh AVIC configuration when changing APIC mode
AMD AVIC can support xAPIC and x2APIC virtualization,
which requires changing x2APIC bit VMCB and MSR intercepton
for x2APIC MSRs. Therefore, call avic_refresh_apicv_exec_ctrl()
to refresh configuration accordingly.
Reviewed-by: Maxim Levitsky <[email protected]>
Signed-off-by: Suravee Suthikulpanit <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Diffstat (limited to 'arch/x86/kvm/svm/svm.c')
-rw-r--r-- | arch/x86/kvm/svm/svm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 382edac728c7..67ba0d3a7f62 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -4793,6 +4793,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { .enable_nmi_window = svm_enable_nmi_window, .enable_irq_window = svm_enable_irq_window, .update_cr8_intercept = svm_update_cr8_intercept, + .set_virtual_apic_mode = avic_set_virtual_apic_mode, .refresh_apicv_exec_ctrl = avic_refresh_apicv_exec_ctrl, .check_apicv_inhibit_reasons = avic_check_apicv_inhibit_reasons, .apicv_post_state_restore = avic_apicv_post_state_restore, |