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authorIngo Molnar <[email protected]>2016-06-08 09:26:46 +0200
committerIngo Molnar <[email protected]>2016-06-08 09:26:46 +0200
commit616d1c1b98ac79f30216a57a170dd7cea19b3df3 (patch)
tree6f244c2e5a7160190e73bc82b4cd7fa7bb22ee31 /arch/tile/kernel/pci_gx.c
parenta4f144ebbdf6f7807c477bce8e136047ed27321f (diff)
parentc8ae067f2635be0f8c7e5db1bb74b757d623e05b (diff)
Merge branch 'linus' into perf/core, to refresh the branch
Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'arch/tile/kernel/pci_gx.c')
-rw-r--r--arch/tile/kernel/pci_gx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index aa2b44cd8fd3..0e7a5d09e023 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -40,7 +40,7 @@
#include <arch/sim.h>
/*
- * This file containes the routines to search for PCI buses,
+ * This file contains the routines to search for PCI buses,
* enumerate the buses, and configure any attached devices.
*/
@@ -434,7 +434,7 @@ int __init tile_pci_init(void)
/*
* Now determine which PCIe ports are configured to operate in RC
- * mode. There is a differece in the port configuration capability
+ * mode. There is a difference in the port configuration capability
* between the Gx36 and Gx72 devices.
*
* The Gx36 has configuration capability for each of the 3 PCIe