diff options
| author | Pu Lehui <[email protected]> | 2024-01-15 13:12:34 +0000 |
|---|---|---|
| committer | Daniel Borkmann <[email protected]> | 2024-01-29 16:25:33 +0100 |
| commit | 519fb722bea09ae2664ad21f8ef4360fb799eb2f (patch) | |
| tree | e20f5b0751cd2551f703834bd9be65633771a59c /arch/riscv/net/bpf_jit_comp64.c | |
| parent | 647b93f65daa128d9a0e4aac744a5fcf5f58b2d2 (diff) | |
riscv, bpf: Optimize sign-extention mov insns with Zbb support
Add 8-bit and 16-bit sign-extention wraper with Zbb support to optimize
sign-extension mov instructions.
Signed-off-by: Pu Lehui <[email protected]>
Signed-off-by: Daniel Borkmann <[email protected]>
Tested-by: Björn Töpel <[email protected]>
Acked-by: Björn Töpel <[email protected]>
Link: https://lore.kernel.org/bpf/[email protected]
Diffstat (limited to 'arch/riscv/net/bpf_jit_comp64.c')
| -rw-r--r-- | arch/riscv/net/bpf_jit_comp64.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c index 0a26842535ea..fc1a334e2f70 100644 --- a/arch/riscv/net/bpf_jit_comp64.c +++ b/arch/riscv/net/bpf_jit_comp64.c @@ -1074,9 +1074,10 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, emit_mv(rd, rs, ctx); break; case 8: + emit_sextb(rd, rs, ctx); + break; case 16: - emit_slli(RV_REG_T1, rs, 64 - insn->off, ctx); - emit_srai(rd, RV_REG_T1, 64 - insn->off, ctx); + emit_sexth(rd, rs, ctx); break; case 32: emit_sextw(rd, rs, ctx); |