diff options
| author | Samuel Holland <[email protected]> | 2024-03-26 21:49:43 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2024-04-29 10:49:25 -0700 |
| commit | aaa56c8f378dd798f4a7f633cbf2eb129e98e6a4 (patch) | |
| tree | 5c910bc75769690d20f15587d91c780ec8028bba /arch/riscv/mm/cacheflush.c | |
| parent | 58661a30f1bcc748475ffd9be6d2fc9e4e6be679 (diff) | |
riscv: Factor out page table TLB synchronization
The logic is the same for all page table levels. See commit 69be3fb111e7
("riscv: enable MMU_GATHER_RCU_TABLE_FREE for SMP && MMU").
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Alexandre Ghiti <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'arch/riscv/mm/cacheflush.c')
0 files changed, 0 insertions, 0 deletions