diff options
| author | Anup Patel <[email protected]> | 2020-08-17 18:12:50 +0530 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2020-08-20 10:58:13 -0700 |
| commit | 2bc3fc877aa9c4c8b80cc49f66dfcb7e4857a128 (patch) | |
| tree | 0bee46a80c0d3d86a344e45c5fe1ef670e2f08b6 /arch/riscv/kernel/smpboot.c | |
| parent | 2ac6795fcc085e8d03649f1bbd0d70aaff612cad (diff) | |
RISC-V: Remove CLINT related code from timer and arch
Right now the RISC-V timer driver is convoluted to support:
1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for
clocksource and SBI timer calls for clockevent device.
2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO
counter register for clocksource and CLINT MMIO compare register
for clockevent device.
We now have a separate CLINT timer driver which also provide CLINT
based IPI operations so let's remove CLINT MMIO related code from
arch/riscv directory and RISC-V timer driver.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Emil Renner Berhing <[email protected]>
Acked-by: Daniel Lezcano <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Reviewed-by: Palmer Dabbelt <[email protected]>
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'arch/riscv/kernel/smpboot.c')
| -rw-r--r-- | arch/riscv/kernel/smpboot.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 12033d71ba0c..96167d55ed98 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -24,7 +24,6 @@ #include <linux/of.h> #include <linux/sched/task_stack.h> #include <linux/sched/mm.h> -#include <asm/clint.h> #include <asm/cpu_ops.h> #include <asm/irq.h> #include <asm/mmu_context.h> |