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authorDavid Hildenbrand <[email protected]>2023-01-13 18:10:18 +0100
committerAndrew Morton <[email protected]>2023-02-02 22:33:09 -0800
commit2bba2ffbe0303552142af944b891967ccf69a63b (patch)
treec8f322a591401e5ddda8be73212f944aadd84c52 /arch/riscv/include/asm/pgtable-bits.h
parent8897ebff37fd34920d380cbfafbfb47804eb4009 (diff)
powerpc/nohash/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE
Let's support __HAVE_ARCH_PTE_SWP_EXCLUSIVE on 32bit and 64bit. On 64bit, let's use MSB 56 (LSB 7), located right next to the page type. On 32bit, let's use LSB 2 to avoid stealing one bit from the swap offset. There seems to be no real reason why these bits cannot be used for swap PTEs. The important part is that _PAGE_PRESENT and _PAGE_HASHPTE remain 0. While at it, mask the type in __swp_entry() and remove _PAGE_BIT_SWAP_TYPE from pte-e500.h: while it was used in 64bit code it was ignored in 32bit code. Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: David Hildenbrand <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: Nicholas Piggin <[email protected]> Cc: Christophe Leroy <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
Diffstat (limited to 'arch/riscv/include/asm/pgtable-bits.h')
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