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authorChristophe Leroy <[email protected]>2019-09-16 20:25:41 +0000
committerMichael Ellerman <[email protected]>2019-11-19 19:38:38 +1100
commit6b7c095a51e1bad8b27fa1bc8753af0b613464a3 (patch)
tree36e017559f98dbdb97fd1270cd310e8bf011efc9 /arch/powerpc/sysdev/simple_gpio.c
parentcbcaff7d27ad5c5d2c2db113ec489be88adb815a (diff)
powerpc/83xx: map IMMR with a BAT.
On mpc83xx with a QE, IMMR is 2Mbytes and aligned on 2Mbytes boundarie. On mpc83xx without a QE, IMMR is 1Mbyte and 1Mbyte aligned. Each driver will map a part of it to access the registers it needs. Some drivers will map the same part of IMMR as other drivers. In order to reduce TLB misses, map the full IMMR with a BAT. If it is 2Mbytes aligned, map 2Mbytes. If there is no QE, the upper part will remain unused, but it doesn't harm as it is mapped as guarded memory. When the IMMR is not aligned on a 2Mbytes boundarie, only map 1Mbyte. Signed-off-by: Christophe Leroy <[email protected]> Acked-by: Scott Wood <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/269a00951328fb6fa1be2fa3cbc76c19745019b7.1568665466.git.christophe.leroy@c-s.fr
Diffstat (limited to 'arch/powerpc/sysdev/simple_gpio.c')
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