diff options
author | Nicholas Piggin <npiggin@gmail.com> | 2021-10-28 23:30:43 +1000 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-10-29 23:12:37 +1100 |
commit | 81291383ffde08b23bce75e7d6b2575ce9d3475c (patch) | |
tree | cc3b9e03b90f260d7d49fd85be2c0fdb933f4bf0 /arch/powerpc/perf | |
parent | 52862ab33c5d97490f3fa345d6529829e6d6637b (diff) |
powerpc/32e: Ignore ESR in instruction storage interrupt handler
A e5500 machine running a 32-bit kernel sometimes hangs at boot,
seemingly going into an infinite loop of instruction storage interrupts.
The ESR (Exception Syndrome Register) has a value of 0x800000 (store)
when this happens, which is likely set by a previous store. An
instruction TLB miss interrupt would then leave ESR unchanged, and if no
PTE exists it calls directly to the instruction storage interrupt
handler without changing ESR.
access_error() does not cause a segfault due to a store to a read-only
vma because is_exec is true. Most subsequent fault handling does not
check for a write fault on a read-only vma, and might do strange things
like create a writeable PTE or call page_mkwrite on a read only vma or
file. It's not clear what happens here to cause the infinite faulting in
this case, a fault handler failure or low level PTE or TLB handling.
In any case this can be fixed by having the instruction storage
interrupt zero regs->dsisr rather than storing the ESR value to it.
Fixes: a01a3f2ddbcd ("powerpc: remove arguments from fault handler functions")
Cc: stable@vger.kernel.org # v5.12+
Reported-by: Jacques de Laval <jacques.delaval@protonmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Tested-by: Jacques de Laval <jacques.delaval@protonmail.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211028133043.4159501-1-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/perf')
0 files changed, 0 insertions, 0 deletions