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| author | Petr Mladek <[email protected]> | 2021-11-02 10:39:27 +0100 |
|---|---|---|
| committer | Petr Mladek <[email protected]> | 2021-11-02 10:39:27 +0100 |
| commit | 40e64a88dadcfa168914065baf7f035de957bbe0 (patch) | |
| tree | 06c8c4a9e6c1b478aa6851794c6a33bec1ce6ec4 /arch/powerpc/include/asm/xive-regs.h | |
| parent | 24a1dffbecafeb00d8830985eb7a318e37aabc4e (diff) | |
| parent | 6a7ca80f4033c9cf3003625b2ef8b497f4ec44da (diff) | |
Merge branch 'for-5.16-vsprintf-pgp' into for-linus
Diffstat (limited to 'arch/powerpc/include/asm/xive-regs.h')
| -rw-r--r-- | arch/powerpc/include/asm/xive-regs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/xive-regs.h b/arch/powerpc/include/asm/xive-regs.h index 8b211faa0e42..cf8bb6ac4463 100644 --- a/arch/powerpc/include/asm/xive-regs.h +++ b/arch/powerpc/include/asm/xive-regs.h @@ -80,10 +80,13 @@ #define TM_QW0W2_VU PPC_BIT32(0) #define TM_QW0W2_LOGIC_SERV PPC_BITMASK32(1,31) // XX 2,31 ? #define TM_QW1W2_VO PPC_BIT32(0) +#define TM_QW1W2_HO PPC_BIT32(1) /* P10 XIVE2 */ #define TM_QW1W2_OS_CAM PPC_BITMASK32(8,31) #define TM_QW2W2_VP PPC_BIT32(0) +#define TM_QW2W2_HP PPC_BIT32(1) /* P10 XIVE2 */ #define TM_QW2W2_POOL_CAM PPC_BITMASK32(8,31) #define TM_QW3W2_VT PPC_BIT32(0) +#define TM_QW3W2_HT PPC_BIT32(1) /* P10 XIVE2 */ #define TM_QW3W2_LP PPC_BIT32(6) #define TM_QW3W2_LE PPC_BIT32(7) #define TM_QW3W2_T PPC_BIT32(31) |