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authorJordan Niethe <[email protected]>2020-05-06 13:40:48 +1000
committerMichael Ellerman <[email protected]>2020-05-19 00:11:03 +1000
commit9409d2f9dad2f0679d67dc24d8116dd3e837b035 (patch)
tree8dda61e04dbedf6d9f522994050cda1ef8a7935e /arch/powerpc/include/asm/sstep.h
parentb4657f7650babc9bfb41ce875abe41b18604a105 (diff)
powerpc: Support prefixed instructions in alignment handler
If a prefixed instruction results in an alignment exception, the SRR1_PREFIXED bit is set. The handler attempts to emulate the responsible instruction and then increment the NIP past it. Use SRR1_PREFIXED to determine by how much the NIP should be incremented. Prefixed instructions are not permitted to cross 64-byte boundaries. If they do the alignment interrupt is invoked with SRR1 BOUNDARY bit set. If this occurs send a SIGBUS to the offending process if in user mode. If in kernel mode call bad_page_fault(). Signed-off-by: Jordan Niethe <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Reviewed-by: Alistair Popple <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'arch/powerpc/include/asm/sstep.h')
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