diff options
| author | Helge Deller <[email protected]> | 2024-01-17 17:46:43 +0100 |
|---|---|---|
| committer | Helge Deller <[email protected]> | 2024-01-28 09:49:46 +0100 |
| commit | b9402e3b97289ca9e0f0f79f4df64bd6c9176a86 (patch) | |
| tree | 68cb7031eb4abd058f99873982b14fb5f592fe29 /arch/parisc/kernel/cache.c | |
| parent | 2751153b9945c31eb905deb9fbe2d7f127b4b34c (diff) | |
parisc: Check for valid stride size for cache flushes
Report if the calculated cache stride size is zero, otherwise the cache
flushing routine will never finish and hang the machine.
This can be reproduced with a testcase in qemu, where the firmware reports
wrong cache values.
Signed-off-by: Helge Deller <[email protected]>
Diffstat (limited to 'arch/parisc/kernel/cache.c')
| -rw-r--r-- | arch/parisc/kernel/cache.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c index 268d90a9325b..0c015487e5db 100644 --- a/arch/parisc/kernel/cache.c +++ b/arch/parisc/kernel/cache.c @@ -264,6 +264,10 @@ parisc_cache_init(void) icache_stride = CAFL_STRIDE(cache_info.ic_conf); #undef CAFL_STRIDE + /* stride needs to be non-zero, otherwise cache flushes will not work */ + WARN_ON(cache_info.dc_size && dcache_stride == 0); + WARN_ON(cache_info.ic_size && icache_stride == 0); + if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) == PDC_MODEL_NVA_UNSUPPORTED) { printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n"); |