diff options
| author | Stafford Horne <[email protected]> | 2023-04-14 08:27:51 +0100 |
|---|---|---|
| committer | Stafford Horne <[email protected]> | 2023-04-26 15:08:06 +0100 |
| commit | 27267655c5313ba0f5a3caa9ad35d887d9a12574 (patch) | |
| tree | d72bb9628b509240ca045f77f9bfc98c4680cb0d /arch/openrisc/kernel/traps.c | |
| parent | 63d7f9f11e5e81de2ce8f1c7a8aaed5b0288eddf (diff) | |
openrisc: Support floating point user api
Add support for handling floating point exceptions and forwarding the
SIGFPE signal to processes. Also, add fpu state to sigcontext.
Signed-off-by: Stafford Horne <[email protected]>
Diffstat (limited to 'arch/openrisc/kernel/traps.c')
| -rw-r--r-- | arch/openrisc/kernel/traps.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c index f5bbe6b55849..0aa6b07efda1 100644 --- a/arch/openrisc/kernel/traps.c +++ b/arch/openrisc/kernel/traps.c @@ -243,6 +243,28 @@ asmlinkage void unhandled_exception(struct pt_regs *regs, int ea, int vector) die("Oops", regs, 9); } +asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) +{ + int code = FPE_FLTUNK; + unsigned long fpcsr = regs->fpcsr; + + if (fpcsr & SPR_FPCSR_IVF) + code = FPE_FLTINV; + else if (fpcsr & SPR_FPCSR_OVF) + code = FPE_FLTOVF; + else if (fpcsr & SPR_FPCSR_UNF) + code = FPE_FLTUND; + else if (fpcsr & SPR_FPCSR_DZF) + code = FPE_FLTDIV; + else if (fpcsr & SPR_FPCSR_IXF) + code = FPE_FLTRES; + + /* Clear all flags */ + regs->fpcsr &= ~SPR_FPCSR_ALLF; + + force_sig_fault(SIGFPE, code, (void __user *)regs->pc); +} + asmlinkage void do_trap(struct pt_regs *regs, unsigned long address) { force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->pc); |