diff options
| author | Ingo Molnar <[email protected]> | 2016-06-08 09:26:46 +0200 |
|---|---|---|
| committer | Ingo Molnar <[email protected]> | 2016-06-08 09:26:46 +0200 |
| commit | 616d1c1b98ac79f30216a57a170dd7cea19b3df3 (patch) | |
| tree | 6f244c2e5a7160190e73bc82b4cd7fa7bb22ee31 /arch/mips/pci/ops-bridge.c | |
| parent | a4f144ebbdf6f7807c477bce8e136047ed27321f (diff) | |
| parent | c8ae067f2635be0f8c7e5db1bb74b757d623e05b (diff) | |
Merge branch 'linus' into perf/core, to refresh the branch
Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'arch/mips/pci/ops-bridge.c')
| -rw-r--r-- | arch/mips/pci/ops-bridge.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/pci/ops-bridge.c b/arch/mips/pci/ops-bridge.c index 438319465cb4..57e1463fcd02 100644 --- a/arch/mips/pci/ops-bridge.c +++ b/arch/mips/pci/ops-bridge.c @@ -33,9 +33,9 @@ static u32 emulate_ioc3_cfg(int where, int size) * The Bridge ASIC supports both type 0 and type 1 access. Type 1 is * not really documented, so right now I can't write code which uses it. * Therefore we use type 0 accesses for now even though they won't work - * correcly for PCI-to-PCI bridges. + * correctly for PCI-to-PCI bridges. * - * The function is complicated by the ultimate brokeness of the IOC3 chip + * The function is complicated by the ultimate brokenness of the IOC3 chip * which is used in SGI systems. The IOC3 can only handle 32-bit PCI * accesses and does only decode parts of it's address space. */ |