diff options
| author | Jiri Kosina <[email protected]> | 2020-04-01 12:26:12 +0200 |
|---|---|---|
| committer | Jiri Kosina <[email protected]> | 2020-04-01 12:26:12 +0200 |
| commit | c9f289701540baeef9ac7c9977d67a7259f404db (patch) | |
| tree | ac3c29d41da02ac735c9a12da78905842fbccd2f /arch/mips/include/asm/sn/intr.h | |
| parent | 0aac6f9aaae5fba08963651d2ce49930145e118f (diff) | |
| parent | 910a7e89cec65efad254c947ce2bf8bf5b370962 (diff) | |
Merge branch 'for-5.7/appleir' into for-linus
- small code cleanups in hid-appleir from Lucas Tanure
Diffstat (limited to 'arch/mips/include/asm/sn/intr.h')
| -rw-r--r-- | arch/mips/include/asm/sn/intr.h | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/mips/include/asm/sn/intr.h b/arch/mips/include/asm/sn/intr.h index fc1348193957..3d6954d370dc 100644 --- a/arch/mips/include/asm/sn/intr.h +++ b/arch/mips/include/asm/sn/intr.h @@ -8,15 +8,6 @@ #ifndef __ASM_SN_INTR_H #define __ASM_SN_INTR_H -/* Number of interrupt levels associated with each interrupt register. */ -#define N_INTPEND_BITS 64 - -#define INT_PEND0_BASELVL 0 -#define INT_PEND1_BASELVL 64 - -#define N_INTPENDJUNK_BITS 8 -#define INTPENDJUNK_CLRBIT 0x80 - /* * Macros to manipulate the interrupt register on the calling hub chip. */ @@ -84,14 +75,6 @@ do { \ #define CPU_RESCHED_B_IRQ 8 #define CPU_CALL_A_IRQ 9 #define CPU_CALL_B_IRQ 10 -#define MSC_MESG_INTR 11 -#define BASE_PCI_IRQ 12 - -/* - * INT_PEND0 again, bits determined by hardware / hardcoded: - */ -#define SDISK_INTR 63 /* SABLE name */ -#define IP_PEND0_6_63 63 /* What is this bit? */ /* * INT_PEND1 hard-coded bits: |