diff options
| author | Russell King <[email protected]> | 2008-10-15 23:16:07 +0100 |
|---|---|---|
| committer | Russell King <[email protected]> | 2008-10-15 23:16:07 +0100 |
| commit | 2502991560dc8244dbe10e48473d85722c1e2ec1 (patch) | |
| tree | 63b1f3be2ed56ff06f1e8db709e4ce85d69c3add /arch/mips/include/asm/cachectl.h | |
| parent | 7e69a8c4d06b7ecb874f571e82b715a9f79bc3c4 (diff) | |
| parent | a9ff8f6462635c8d9f8d64b7b10ddcea8404d77b (diff) | |
Merge branch 'fixes' into for-linus
Conflicts:
arch/arm/mach-versatile/core.c
Diffstat (limited to 'arch/mips/include/asm/cachectl.h')
| -rw-r--r-- | arch/mips/include/asm/cachectl.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cachectl.h b/arch/mips/include/asm/cachectl.h new file mode 100644 index 000000000000..f3ce721861d3 --- /dev/null +++ b/arch/mips/include/asm/cachectl.h @@ -0,0 +1,26 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1994, 1995, 1996 by Ralf Baechle + */ +#ifndef _ASM_CACHECTL +#define _ASM_CACHECTL + +/* + * Options for cacheflush system call + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* _ASM_CACHECTL */ |