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| author | Michal Simek <[email protected]> | 2012-03-30 12:10:03 +0200 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2012-03-30 12:10:03 +0200 |
| commit | 6a4770e335bd4df0a4577146f76e116ab6e23f40 (patch) | |
| tree | 305056c20b6ccf3a4fed00e9e32f3a1dd039cd70 /arch/m32r/include/asm/dcache_clear.h | |
| parent | ac64a9caa55bdfd8d24784f25c68cb7919ddabe3 (diff) | |
| parent | f52b69f86e27903d6896ed5fa7cd280fec8de532 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into next
Diffstat (limited to 'arch/m32r/include/asm/dcache_clear.h')
| -rw-r--r-- | arch/m32r/include/asm/dcache_clear.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/m32r/include/asm/dcache_clear.h b/arch/m32r/include/asm/dcache_clear.h new file mode 100644 index 000000000000..a0ae06c2e9e7 --- /dev/null +++ b/arch/m32r/include/asm/dcache_clear.h @@ -0,0 +1,29 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto + * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> + */ +#ifndef _ASM_M32R_DCACHE_CLEAR_H +#define _ASM_M32R_DCACHE_CLEAR_H + +#ifdef CONFIG_CHIP_M32700_TS1 +#define DCACHE_CLEAR(reg0, reg1, addr) \ + "seth "reg1", #high(dcache_dummy); \n\t" \ + "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \ + "lock "reg0", @"reg1"; \n\t" \ + "add3 "reg0", "addr", #0x1000; \n\t" \ + "ld "reg0", @"reg0"; \n\t" \ + "add3 "reg0", "addr", #0x2000; \n\t" \ + "ld "reg0", @"reg0"; \n\t" \ + "unlock "reg0", @"reg1"; \n\t" + /* FIXME: This workaround code cannot handle kernel modules + * correctly under SMP environment. + */ +#else /* CONFIG_CHIP_M32700_TS1 */ +#define DCACHE_CLEAR(reg0, reg1, addr) +#endif /* CONFIG_CHIP_M32700_TS1 */ + +#endif /* _ASM_M32R_DCACHE_CLEAR_H */ |