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authorSricharan R <[email protected]>2013-09-18 16:50:11 +0530
committerTony Lindgren <[email protected]>2013-10-08 14:26:06 -0700
commit38a1981ce31dc4c527cbc0137f638543261b471a (patch)
tree01cd91e9b8dbba695c48207855ba496aa0216d80 /arch/arm/mach-omap2/id.c
parentd0e639c9e06d44e713170031fe05fb60ebe680af (diff)
ARM: OMAP2+: DRA7: realtime_counter: Add ratio registers for 20MHZ sys-clk frequency
The real time counter also called master counter, is a free-running counter. It produces the count used by the CPU local timer peripherals in the MPU cluster. The timer counts at a rate of 6.144 MHz. The ratio registers are missing for a sys-clk of 20MHZ which is used by DRA7 socs. So because of this, the counter was getting wrongly programmed for a sys-clk of 38.4Mhz(default). So adding the ratio registers for 20MHZ sys-clk. Tested-by: Nishanth Menon <[email protected]> Acked-by: Santosh Shilimkar <[email protected]> Signed-off-by: Sricharan R <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
Diffstat (limited to 'arch/arm/mach-omap2/id.c')
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