blaster4385/linux-IllusionX/drivers/gpu/drm/etnaviv, branch v6.12.1

Merge drm/drm-next into drm-misc-next

2024-07-29T07:35:54Z

Backmerging to get a late RC of v6.10 before moving into v6.11. Signed-off-by: Thomas Zimmermann

drm/scheduler: remove full_recover from drm_sched_start

2024-07-25T12:05:12Z

This was basically just another one of amdgpus hacks. The parameter allowed to restart the scheduler without turning fence signaling on again. That this is absolutely not a good idea should be obvious by now since the fences will then just sit there and never signal. While at it cleanup the code a bit. Signed-off-by: Christian König Reviewed-by: Matthew Brost Link: https://patchwork.freedesktop.org/patch/msgid/20240722083816.99685-1-christian.koenig@amd.com

drm/etnaviv: don't block scheduler when GPU is still active

2024-06-26T13:33:25Z

Since 45ecaea73883 ("drm/sched: Partial revert of 'drm/sched: Keep s_fence->parent pointer'") still active jobs aren't put back in the pending list on drm_sched_start(), as they don't have a active parent fence anymore, so if the GPU is still working and the timeout is extended, all currently active jobs will be freed. To avoid prematurely freeing jobs that are still active on the GPU, don't block the scheduler until we are fully committed to actually reset the GPU. As the current job is already removed from the pending list and will not be put back when drm_sched_start() isn't called, we must make sure to put the job back on the pending list when extending the timeout. Cc: stable@vger.kernel.org #6.0 Signed-off-by: Lucas Stach Reviewed-by: Philipp Zabel Reviewed-by: Christian Gmeiner

drm/etnaviv: reduce number of ktime_get calls in IRQ handler

2024-06-26T13:32:47Z

A single IRQ might signal the completion of multiple jobs/fences at once. There is no point in attaching a new timestamp to each fence that only differs in when exactly the IRQ handler was able to process this fence. Get a single timestamp when the IRQ handler has determined that there are completed jobs and reuse this for all fences that get signalled by the handler. Signed-off-by: Lucas Stach Reviewed-by: Philipp Zabel Reviewed-by: Christian Gmeiner

drm/etnaviv: fix DMA direction handling for cached RW buffers

2024-06-26T13:31:58Z

The dma sync operation needs to be done with DMA_BIDIRECTIONAL when the BO is prepared for both read and write operations. Fixes: a8c21a5451d8 ("drm/etnaviv: add initial etnaviv DRM driver") Signed-off-by: Lucas Stach Reviewed-by: Philipp Zabel Reviewed-by: Christian Gmeiner

drm/etnaviv: switch devcoredump allocations to GFP_NOWAIT

2024-06-26T13:31:33Z

The etnaviv devcoredump is created in the GPU reset path, which must make forward progress to avoid stalling memory reclaim on unsignalled dma fences. The currently used __GFP_NORETRY does not prohibit sleeping on direct reclaim, breaking the forward progress guarantee. Switch to GFP_NOWAIT, which allows background reclaim to be triggered, but avoids any stalls waiting for direct reclaim. Signed-off-by: Lucas Stach Reviewed-by: Daniel Vetter

drm/etnaviv: don't disable TS on MMUv2 core when moving the linear window

2024-06-19T18:35:14Z

On MMUv2 cores the linear window is only relevant when starting the FE, before the MMU has been activated. Once the MMU is active, all accesses are translated with no way to bypass the MMU via the linear window. Thus TS ignoring the linear window offset is not an issue on cores with MMUv2 present and there is no need to disable TS when we need to move the linear window. Signed-off-by: Lucas Stach Tested-by: Joao Paulo Goncalves

drm/etnaviv: Read some FE registers twice

2024-06-19T18:35:14Z

On some hardware (such at the GC7000 rev 6009), these registers need to be read twice to return the correct value. Hide that in gpu_read(). Signed-off-by: Derek Foreman Signed-off-by: Lucas Stach

drm/etnaviv: Disable SH_EU clock gating on VIPNano-Si+

2024-05-16T17:07:19Z

Disable SH_EU clock gating for the VIPNano-Si+ NPU on i.MX8MP and for other affected core revisions. Taken from linux-imx lf-6.1.36-2.1.0, specifically [1]. [1] https://github.com/nxp-imx/linux-imx/blob/lf-6.1.36-2.1.0/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c#L2747-L2761 Signed-off-by: Philipp Zabel Signed-off-by: Lucas Stach

drm/etnaviv: Turn etnaviv_is_model_rev() into a function

2024-05-16T17:07:14Z

Turn the etnaviv_is_model_rev() macro into a static inline function. Use the raw model number as a parameter instead of the chipModel_GCxxxx defines. This reduces synchronization requirements for the generated headers. For newer hardware, the GCxxxx names are not the correct model names anyway. For example, model 0x8000 NPUs are called VIPNano-QI/SI(+) by VeriSilicon. Signed-off-by: Philipp Zabel Signed-off-by: Lucas Stach