Linux kernel with personal config changes for arch linux https://git.tablaster.dev/blaster4385/linux-IllusionX/atom?h=v6.13 2025-01-23T18:56:04Z 2025-01-23T18:56:04Z Blaster4385 venkatesh@tablaster.dev 2025-01-23T18:54:51Z urn:sha1:e498d1ab6b446dd3f7965680e923a4bc46452d4d 2025-01-23T16:56:54Z graysky therealgraysky AT proton DOT me 2024-09-16T09:55:58Z urn:sha1:d77859bc3f8ddbe8110d6e9da6e7e2aed3d60d73 From https://github.com/graysky2/kernel_compiler_patch more-ISA-levels-and-uarches-for-kernel-6.1.79+.patch FEATURES This patch adds additional tunings via new x86-64 ISA levels and more micro-architecture options to the Linux kernel in three classes. 1. New generic x86-64 ISA levels These are selectable under: Processor type and features ---> x86-64 compiler ISA level • x86-64 A value of (1) is the default • x86-64-v2 A value of (2) brings support for vector instructions up to Streaming SIMD Extensions 4.2 (SSE4.2) and Supplemental Streaming SIMD Extensions 3 (SSSE3), the POPCNT instruction, and CMPXCHG16B. • x86-64-v3 A value of (3) adds vector instructions up to AVX2, MOVBE, and additional bit-manipulation instructions. There is also x86-64-v4 but including this makes little sense as the kernel does not use any of the AVX512 instructions anyway. Users of glibc 2.33 and above can see which level is supported by running: /lib/ld-linux-x86-64.so.2 --help | grep supported Or /lib64/ld-linux-x86-64.so.2 --help | grep supported 2. New micro-architectures These are selectable under: Processor type and features ---> Processor family • AMD Improved K8-family • AMD K10-family • AMD Family 10h (Barcelona) • AMD Family 14h (Bobcat) • AMD Family 16h (Jaguar) • AMD Family 15h (Bulldozer) • AMD Family 15h (Piledriver) • AMD Family 15h (Steamroller) • AMD Family 15h (Excavator) • AMD Family 17h (Zen) • AMD Family 17h (Zen 2) • AMD Family 19h (Zen 3)** • AMD Family 19h (Zen 4)‡ • AMD Family 1Ah (Zen 5)§ • Intel Silvermont low-power processors • Intel Goldmont low-power processors (Apollo Lake and Denverton) • Intel Goldmont Plus low-power processors (Gemini Lake) • Intel 1st Gen Core i3/i5/i7 (Nehalem) • Intel 1.5 Gen Core i3/i5/i7 (Westmere) • Intel 2nd Gen Core i3/i5/i7 (Sandybridge) • Intel 3rd Gen Core i3/i5/i7 (Ivybridge) • Intel 4th Gen Core i3/i5/i7 (Haswell) • Intel 5th Gen Core i3/i5/i7 (Broadwell) • Intel 6th Gen Core i3/i5/i7 (Skylake) • Intel 6th Gen Core i7/i9 (Skylake X) • Intel 8th Gen Core i3/i5/i7 (Cannon Lake) • Intel 10th Gen Core i7/i9 (Ice Lake) • Intel Xeon (Cascade Lake) • Intel Xeon (Cooper Lake)* • Intel 3rd Gen 10nm++ i3/i5/i7/i9-family (Tiger Lake)* • Intel 4th Gen 10nm++ Xeon (Sapphire Rapids)† • Intel 11th Gen i3/i5/i7/i9-family (Rocket Lake)† • Intel 12th Gen i3/i5/i7/i9-family (Alder Lake)† • Intel 13th Gen i3/i5/i7/i9-family (Raptor Lake)‡ • Intel 14th Gen i3/i5/i7/i9-family (Meteor Lake)‡ • Intel 5th Gen 10nm++ Xeon (Emerald Rapids)‡ Notes: If not otherwise noted, gcc >=9.1 is required for support. *Requires gcc >=10.1 or clang >=10.0 **Required gcc >=10.3 or clang >=12.0 †Required gcc >=11.1 or clang >=12.0 ‡Required gcc >=13.0 or clang >=15.0.5 §Required gcc >14.0 or clang >=19.0? 3. Auto-detected micro-architecture levels Compile by passing the '-march=native' option which, "selects the CPU to generate code for at compilation time by determining the processor type of the compiling machine. Using -march=native enables all instruction subsets supported by the local machine and will produce code optimized for the local machine under the constraints of the selected instruction set."[1] Users of Intel CPUs should select the 'Intel-Native' option and users of AMD CPUs should select the 'AMD-Native' option. MINOR NOTES RELATING TO INTEL ATOM PROCESSORS This patch also changes -march=atom to -march=bonnell in accordance with the gcc v4.9 changes. Upstream is using the deprecated -match=atom flags when I believe it should use the newer -march=bonnell flag for atom processors.[2] It is not recommended to compile on Atom-CPUs with the 'native' option.[3] The recommendation is to use the 'atom' option instead. BENEFITS Small but real speed increases are measurable using a make endpoint comparing a generic kernel to one built with one of the respective microarchs. See the following experimental evidence supporting this statement: https://github.com/graysky2/kernel_compiler_patch?tab=readme-ov-file#benchmarks REQUIREMENTS linux version 6.1.79+ gcc version >=9.0 or clang version >=9.0 ACKNOWLEDGMENTS This patch builds on the seminal work by Jeroen.[4] REFERENCES 1. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html#index-x86-Options 2. https://bugzilla.kernel.org/show_bug.cgi?id=77461 3. https://github.com/graysky2/kernel_gcc_patch/issues/15 4. http://www.linuxforge.net/docs/linux/linux-gcc.php 2025-01-23T15:37:24Z Blaster4385 venkatesh@tablaster.dev 2025-01-01T11:09:45Z urn:sha1:51ddaef696c8bf8ead655b7c42ade7d4672bfbc0 2025-01-23T15:37:24Z Blaster4385 venkatesh@tablaster.dev 2024-11-29T06:29:45Z urn:sha1:73c5b1a6643665c39bb4b5148d13b32dd990eb9c 2025-01-23T15:37:24Z Blaster4385 venkatesh@tablaster.dev 2024-07-18T19:32:28Z urn:sha1:33ab3303432dd557fb1e20acf2fe966c4a6ea8d0 2025-01-23T15:37:24Z Blaster4385 venkatesh@tablaster.dev 2024-07-18T19:32:23Z urn:sha1:8a497cf29867a457c4f252e3c13bc06b19cbb61d - Enable MGLRU - Disable Intel DRM drivers - Disable some unneeded configs - Enable TMPFS 2025-01-23T15:37:24Z Blaster4385 venkatesh@tablaster.dev 2024-07-18T19:32:19Z urn:sha1:0c1c9e50538f8eb039be2ec28fd4b9fc2bb17383 2025-01-23T15:37:24Z Sultan Alsawaf sultan@kerneltoast.com 2018-05-13T20:02:33Z urn:sha1:329c8834a378b7cf807297dd62e6e4b08f9f643e Signed-off-by: Sultan Alsawaf <sultan@kerneltoast.com> 2025-01-23T15:37:24Z Blaster4385 venkatesh@tablaster.dev 2024-07-18T19:32:17Z urn:sha1:4edda90f5ee8bc8fdcd6f0428d420e4b77470e5c - lz4 is supposedly faster than zstd 2025-01-23T15:37:24Z Blaster4385 venkatesh@tablaster.dev 2024-07-18T19:32:13Z urn:sha1:ac9d9053ee58b05c3d311042d50131eeaa83de7f