Zachary Amsden c9b02a2413 [PATCH] i386: use set_pte macros in a couple places where they were missing ... Also, setting PDPEs in PAE mode does not require atomic operations, since the PDPEs are cached by the processor, and only reloaded on an explicit or implicit reload of CR3. Since the four PDPEs must always be present in an active root, and the kernel PDPE is never updated, we are safe even from SMIs and interrupts / NMIs using task gates (which reload CR3). Actually, much of this is moot, since the user PDPEs are never updated either, and the only usage of task gates is by the doublefault handler. It appears the only place PGDs get updated in PAE mode is in init_low_mappings() / zap_low_mapping() for initial page table creation and recovery from ACPI sleep state, and these sites are safe by inspection. Getting rid of the cmpxchg8b saves code space and 720 cycles in pgd_alloc on P4. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>		2005-09-05 00:06:12 -07:00
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alpha
arm
arm26
cris
frv	[PATCH] frv: Remove export of strtok()	2005-09-05 00:06:01 -07:00
h8300
i386	[PATCH] i386: use set_pte macros in a couple places where they were missing	2005-09-05 00:06:12 -07:00
ia64
m32r
m68k
m68knommu
mips	[PATCH] mips: fix build warnings	2005-09-05 00:06:08 -07:00
parisc
ppc	[PATCH] ppc32: cpci690 updates	2005-09-05 00:06:01 -07:00
ppc64	[PATCH] ppc64: replace schedule_timeout() with msleep_interruptible()	2005-09-05 00:06:01 -07:00
s390
sh
sh64	[PATCH] arch/sh64/Kconfig: doesn't need it's own LOG_BUF_SHIFT	2005-09-05 00:06:09 -07:00
sparc
sparc64
um
v850
x86_64
xtensa