1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
214 lines
4.9 KiB
C
214 lines
4.9 KiB
C
/* Minimal support functions to read configuration from IIC EEPROMS
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* on MPC8xx boards. Originally written for RPGC RPX-Lite.
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* Dan Malek (dmalek@jlc.net).
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*/
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#include <linux/types.h>
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#include <asm/uaccess.h>
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#include <asm/mpc8xx.h>
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#include <asm/commproc.h>
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/* IIC functions.
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* These are just the basic master read/write operations so we can
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* examine serial EEPROM.
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*/
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void iic_read(uint devaddr, u_char *buf, uint offset, uint count);
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static int iic_init_done;
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static void
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iic_init(void)
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{
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volatile iic_t *iip;
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volatile i2c8xx_t *i2c;
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volatile cpm8xx_t *cp;
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volatile immap_t *immap;
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uint dpaddr;
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immap = (immap_t *)IMAP_ADDR;
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cp = (cpm8xx_t *)&(immap->im_cpm);
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/* Reset the CPM. This is necessary on the 860 processors
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* that may have started the SCC1 ethernet without relocating
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* the IIC.
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* This also stops the Ethernet in case we were loaded by a
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* BOOTP rom monitor.
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*/
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cp->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
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/* Wait for it.
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*/
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while (cp->cp_cpcr & (CPM_CR_RST | CPM_CR_FLG));
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/* Remove any microcode patches. We will install our own
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* later.
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*/
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cp->cp_cpmcr1 = 0;
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cp->cp_cpmcr2 = 0;
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cp->cp_cpmcr3 = 0;
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cp->cp_cpmcr4 = 0;
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cp->cp_rccr = 0;
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iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
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i2c = (i2c8xx_t *)&(immap->im_i2c);
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/* Initialize Port B IIC pins.
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*/
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cp->cp_pbpar |= 0x00000030;
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cp->cp_pbdir |= 0x00000030;
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cp->cp_pbodr |= 0x00000030;
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/* Initialize the parameter ram.
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*/
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/* Allocate space for a two transmit and one receive buffer
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* descriptor in the DP ram.
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* For now, this address seems OK, but it may have to
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* change with newer versions of the firmware.
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*/
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dpaddr = 0x0840;
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/* Set up the IIC parameters in the parameter ram.
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*/
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iip->iic_tbase = dpaddr;
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iip->iic_rbase = dpaddr + (2 * sizeof(cbd_t));
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iip->iic_tfcr = SMC_EB;
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iip->iic_rfcr = SMC_EB;
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/* This should really be done by the reader/writer.
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*/
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iip->iic_mrblr = 128;
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/* Initialize Tx/Rx parameters.
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*/
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cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_INIT_TRX) | CPM_CR_FLG;
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while (cp->cp_cpcr & CPM_CR_FLG);
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/* Select an arbitrary address. Just make sure it is unique.
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*/
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i2c->i2c_i2add = 0x34;
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/* Make clock run maximum slow.
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*/
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i2c->i2c_i2brg = 7;
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/* Disable interrupts.
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*/
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i2c->i2c_i2cmr = 0;
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i2c->i2c_i2cer = 0xff;
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/* Enable SDMA.
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*/
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immap->im_siu_conf.sc_sdcr = 1;
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iic_init_done = 1;
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}
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/* Read from IIC.
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* Caller provides device address, memory buffer, and byte count.
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*/
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static u_char iitemp[32];
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void
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iic_read(uint devaddr, u_char *buf, uint offset, uint count)
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{
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volatile iic_t *iip;
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volatile i2c8xx_t *i2c;
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volatile cbd_t *tbdf, *rbdf;
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volatile cpm8xx_t *cp;
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volatile immap_t *immap;
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u_char *tb;
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uint temp;
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/* If the interface has not been initialized, do that now.
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*/
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if (!iic_init_done)
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iic_init();
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immap = (immap_t *)IMAP_ADDR;
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cp = (cpm8xx_t *)&(immap->im_cpm);
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iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
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i2c = (i2c8xx_t *)&(immap->im_i2c);
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tbdf = (cbd_t *)&cp->cp_dpmem[iip->iic_tbase];
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rbdf = (cbd_t *)&cp->cp_dpmem[iip->iic_rbase];
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/* Send a "dummy write" operation. This is a write request with
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* only the offset sent, followed by another start condition.
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* This will ensure we start reading from the first location
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* of the EEPROM.
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*/
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tb = iitemp;
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tb = (u_char *)(((uint)tb + 15) & ~15);
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tbdf->cbd_bufaddr = (int)tb;
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*tb = devaddr & 0xfe; /* Device address */
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*(tb+1) = offset; /* Offset */
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tbdf->cbd_datlen = 2; /* Length */
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tbdf->cbd_sc =
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BD_SC_READY | BD_SC_LAST | BD_SC_WRAP | BD_IIC_START;
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i2c->i2c_i2mod = 1; /* Enable */
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i2c->i2c_i2cer = 0xff;
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i2c->i2c_i2com = 0x81; /* Start master */
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/* Wait for IIC transfer.
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*/
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#if 0
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while ((i2c->i2c_i2cer & 3) == 0);
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if (tbdf->cbd_sc & BD_SC_READY)
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printf("IIC ra complete but tbuf ready\n");
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#else
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temp = 10000000;
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while ((tbdf->cbd_sc & BD_SC_READY) && (temp != 0))
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temp--;
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#if 0
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/* We can't do this...there is no serial port yet!
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*/
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if (temp == 0) {
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printf("Timeout reading EEPROM\n");
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return;
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}
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#endif
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#endif
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/* Chip errata, clear enable.
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*/
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i2c->i2c_i2mod = 0;
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/* To read, we need an empty buffer of the proper length.
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* All that is used is the first byte for address, the remainder
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* is just used for timing (and doesn't really have to exist).
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*/
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tbdf->cbd_bufaddr = (int)tb;
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*tb = devaddr | 1; /* Device address */
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rbdf->cbd_bufaddr = (uint)buf; /* Desination buffer */
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tbdf->cbd_datlen = rbdf->cbd_datlen = count + 1; /* Length */
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tbdf->cbd_sc = BD_SC_READY | BD_SC_LAST | BD_SC_WRAP | BD_IIC_START;
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rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
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/* Chip bug, set enable here.
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*/
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i2c->i2c_i2mod = 1; /* Enable */
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i2c->i2c_i2cer = 0xff;
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i2c->i2c_i2com = 0x81; /* Start master */
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/* Wait for IIC transfer.
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*/
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#if 0
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while ((i2c->i2c_i2cer & 1) == 0);
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if (rbdf->cbd_sc & BD_SC_EMPTY)
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printf("IIC read complete but rbuf empty\n");
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#else
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temp = 10000000;
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while ((tbdf->cbd_sc & BD_SC_READY) && (temp != 0))
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temp--;
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#endif
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/* Chip errata, clear enable.
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*/
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i2c->i2c_i2mod = 0;
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}
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