1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
527 lines
11 KiB
ArmAsm
527 lines
11 KiB
ArmAsm
.text
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/page.h>
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#include <asm/msr.h>
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# Copyright 2003 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
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#
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# wakeup_code runs in real mode, and at unknown address (determined at run-time).
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# Therefore it must only use relative jumps/calls.
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#
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# Do we need to deal with A20? It is okay: ACPI specs says A20 must be enabled
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#
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# If physical address of wakeup_code is 0x12345, BIOS should call us with
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# cs = 0x1234, eip = 0x05
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#
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ALIGN
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.align 16
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ENTRY(wakeup_start)
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wakeup_code:
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wakeup_code_start = .
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.code16
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# Running in *copy* of this code, somewhere in low 1MB.
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movb $0xa1, %al ; outb %al, $0x80
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cli
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cld
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# setup data segment
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movw %cs, %ax
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movw %ax, %ds # Make ds:0 point to wakeup_start
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movw %ax, %ss
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mov $(wakeup_stack - wakeup_code), %sp # Private stack is needed for ASUS board
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pushl $0 # Kill any dangerous flags
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popfl
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movl real_magic - wakeup_code, %eax
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cmpl $0x12345678, %eax
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jne bogus_real_magic
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testl $1, video_flags - wakeup_code
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jz 1f
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lcall $0xc000,$3
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movw %cs, %ax
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movw %ax, %ds # Bios might have played with that
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movw %ax, %ss
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1:
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testl $2, video_flags - wakeup_code
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jz 1f
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mov video_mode - wakeup_code, %ax
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call mode_seta
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1:
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movw $0xb800, %ax
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movw %ax,%fs
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movw $0x0e00 + 'L', %fs:(0x10)
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movb $0xa2, %al ; outb %al, $0x80
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lidt %ds:idt_48a - wakeup_code
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xorl %eax, %eax
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movw %ds, %ax # (Convert %ds:gdt to a linear ptr)
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shll $4, %eax
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addl $(gdta - wakeup_code), %eax
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movl %eax, gdt_48a +2 - wakeup_code
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lgdt %ds:gdt_48a - wakeup_code # load gdt with whatever is
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# appropriate
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movl $1, %eax # protected mode (PE) bit
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lmsw %ax # This is it!
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jmp 1f
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1:
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.byte 0x66, 0xea # prefix + jmpi-opcode
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.long wakeup_32 - __START_KERNEL_map
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.word __KERNEL_CS
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.code32
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wakeup_32:
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# Running in this code, but at low address; paging is not yet turned on.
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movb $0xa5, %al ; outb %al, $0x80
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/* Check if extended functions are implemented */
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movl $0x80000000, %eax
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cpuid
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cmpl $0x80000000, %eax
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jbe bogus_cpu
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wbinvd
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mov $0x80000001, %eax
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cpuid
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btl $29, %edx
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jnc bogus_cpu
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movl %edx,%edi
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movw $__KERNEL_DS, %ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %fs
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movw %ax, %gs
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movw $__KERNEL_DS, %ax
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movw %ax, %ss
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mov $(wakeup_stack - __START_KERNEL_map), %esp
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movl saved_magic - __START_KERNEL_map, %eax
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cmpl $0x9abcdef0, %eax
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jne bogus_32_magic
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/*
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* Prepare for entering 64bits mode
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*/
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/* Enable PAE mode and PGE */
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xorl %eax, %eax
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btsl $5, %eax
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btsl $7, %eax
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movl %eax, %cr4
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/* Setup early boot stage 4 level pagetables */
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movl $(wakeup_level4_pgt - __START_KERNEL_map), %eax
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movl %eax, %cr3
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/* Setup EFER (Extended Feature Enable Register) */
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movl $MSR_EFER, %ecx
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rdmsr
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/* Fool rdmsr and reset %eax to avoid dependences */
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xorl %eax, %eax
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/* Enable Long Mode */
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btsl $_EFER_LME, %eax
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/* Enable System Call */
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btsl $_EFER_SCE, %eax
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/* No Execute supported? */
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btl $20,%edi
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jnc 1f
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btsl $_EFER_NX, %eax
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1:
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/* Make changes effective */
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wrmsr
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wbinvd
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xorl %eax, %eax
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btsl $31, %eax /* Enable paging and in turn activate Long Mode */
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btsl $0, %eax /* Enable protected mode */
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btsl $1, %eax /* Enable MP */
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btsl $4, %eax /* Enable ET */
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btsl $5, %eax /* Enable NE */
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btsl $16, %eax /* Enable WP */
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btsl $18, %eax /* Enable AM */
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/* Make changes effective */
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movl %eax, %cr0
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/* At this point:
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CR4.PAE must be 1
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CS.L must be 0
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CR3 must point to PML4
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Next instruction must be a branch
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This must be on identity-mapped page
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*/
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jmp reach_compatibility_mode
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reach_compatibility_mode:
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movw $0x0e00 + 'i', %ds:(0xb8012)
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movb $0xa8, %al ; outb %al, $0x80;
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/*
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* At this point we're in long mode but in 32bit compatibility mode
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* with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
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* EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we load
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* the new gdt/idt that has __KERNEL_CS with CS.L = 1.
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*/
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movw $0x0e00 + 'n', %ds:(0xb8014)
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movb $0xa9, %al ; outb %al, $0x80
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/* Load new GDT with the 64bit segment using 32bit descriptor */
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movl $(pGDT32 - __START_KERNEL_map), %eax
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lgdt (%eax)
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movl $(wakeup_jumpvector - __START_KERNEL_map), %eax
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/* Finally jump in 64bit mode */
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ljmp *(%eax)
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wakeup_jumpvector:
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.long wakeup_long64 - __START_KERNEL_map
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.word __KERNEL_CS
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.code64
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/* Hooray, we are in Long 64-bit mode (but still running in low memory) */
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wakeup_long64:
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/*
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* We must switch to a new descriptor in kernel space for the GDT
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* because soon the kernel won't have access anymore to the userspace
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* addresses where we're currently running on. We have to do that here
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* because in 32bit we couldn't load a 64bit linear address.
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*/
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lgdt cpu_gdt_descr - __START_KERNEL_map
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movw $0x0e00 + 'u', %ds:(0xb8016)
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nop
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nop
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movw $__KERNEL_DS, %ax
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movw %ax, %ss
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %fs
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movw %ax, %gs
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movq saved_esp, %rsp
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movw $0x0e00 + 'x', %ds:(0xb8018)
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movq saved_ebx, %rbx
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movq saved_edi, %rdi
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movq saved_esi, %rsi
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movq saved_ebp, %rbp
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movw $0x0e00 + '!', %ds:(0xb801a)
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movq saved_eip, %rax
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jmp *%rax
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.code32
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.align 64
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gdta:
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.word 0, 0, 0, 0 # dummy
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.word 0, 0, 0, 0 # unused
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.word 0xFFFF # 4Gb - (0x100000*0x1000 = 4Gb)
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.word 0 # base address = 0
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.word 0x9B00 # code read/exec. ??? Why I need 0x9B00 (as opposed to 0x9A00 in order for this to work?)
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.word 0x00CF # granularity = 4096, 386
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# (+5th nibble of limit)
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.word 0xFFFF # 4Gb - (0x100000*0x1000 = 4Gb)
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.word 0 # base address = 0
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.word 0x9200 # data read/write
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.word 0x00CF # granularity = 4096, 386
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# (+5th nibble of limit)
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# this is 64bit descriptor for code
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.word 0xFFFF
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.word 0
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.word 0x9A00 # code read/exec
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.word 0x00AF # as above, but it is long mode and with D=0
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idt_48a:
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.word 0 # idt limit = 0
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.word 0, 0 # idt base = 0L
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gdt_48a:
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.word 0x8000 # gdt limit=2048,
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# 256 GDT entries
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.word 0, 0 # gdt base (filled in later)
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real_save_gdt: .word 0
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.quad 0
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real_magic: .quad 0
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video_mode: .quad 0
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video_flags: .quad 0
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bogus_real_magic:
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movb $0xba,%al ; outb %al,$0x80
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jmp bogus_real_magic
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bogus_32_magic:
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movb $0xb3,%al ; outb %al,$0x80
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jmp bogus_32_magic
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bogus_31_magic:
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movb $0xb1,%al ; outb %al,$0x80
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jmp bogus_31_magic
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bogus_cpu:
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movb $0xbc,%al ; outb %al,$0x80
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jmp bogus_cpu
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/* This code uses an extended set of video mode numbers. These include:
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* Aliases for standard modes
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* NORMAL_VGA (-1)
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* EXTENDED_VGA (-2)
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* ASK_VGA (-3)
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* Video modes numbered by menu position -- NOT RECOMMENDED because of lack
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* of compatibility when extending the table. These are between 0x00 and 0xff.
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*/
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#define VIDEO_FIRST_MENU 0x0000
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/* Standard BIOS video modes (BIOS number + 0x0100) */
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#define VIDEO_FIRST_BIOS 0x0100
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/* VESA BIOS video modes (VESA number + 0x0200) */
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#define VIDEO_FIRST_VESA 0x0200
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/* Video7 special modes (BIOS number + 0x0900) */
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#define VIDEO_FIRST_V7 0x0900
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# Setting of user mode (AX=mode ID) => CF=success
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mode_seta:
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movw %ax, %bx
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#if 0
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cmpb $0xff, %ah
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jz setalias
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testb $VIDEO_RECALC>>8, %ah
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jnz _setrec
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cmpb $VIDEO_FIRST_RESOLUTION>>8, %ah
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jnc setres
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cmpb $VIDEO_FIRST_SPECIAL>>8, %ah
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jz setspc
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cmpb $VIDEO_FIRST_V7>>8, %ah
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jz setv7
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#endif
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cmpb $VIDEO_FIRST_VESA>>8, %ah
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jnc check_vesaa
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#if 0
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orb %ah, %ah
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jz setmenu
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#endif
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decb %ah
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# jz setbios Add bios modes later
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setbada: clc
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ret
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check_vesaa:
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subb $VIDEO_FIRST_VESA>>8, %bh
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orw $0x4000, %bx # Use linear frame buffer
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movw $0x4f02, %ax # VESA BIOS mode set call
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int $0x10
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cmpw $0x004f, %ax # AL=4f if implemented
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jnz _setbada # AH=0 if OK
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stc
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ret
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_setbada: jmp setbada
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.code64
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bogus_magic:
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movw $0x0e00 + 'B', %ds:(0xb8018)
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jmp bogus_magic
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bogus_magic2:
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movw $0x0e00 + '2', %ds:(0xb8018)
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jmp bogus_magic2
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wakeup_stack_begin: # Stack grows down
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.org 0xff0
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wakeup_stack: # Just below end of page
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ENTRY(wakeup_end)
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##
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# acpi_copy_wakeup_routine
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#
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# Copy the above routine to low memory.
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#
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# Parameters:
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# %rdi: place to copy wakeup routine to
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#
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# Returned address is location of code in low memory (past data and stack)
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#
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ENTRY(acpi_copy_wakeup_routine)
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pushq %rax
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pushq %rcx
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pushq %rdx
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sgdt saved_gdt
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sidt saved_idt
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sldt saved_ldt
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str saved_tss
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movq %cr3, %rdx
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movq %rdx, saved_cr3
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movq %cr4, %rdx
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movq %rdx, saved_cr4
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movq %cr0, %rdx
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movq %rdx, saved_cr0
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sgdt real_save_gdt - wakeup_start (,%rdi)
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movl $MSR_EFER, %ecx
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rdmsr
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movl %eax, saved_efer
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movl %edx, saved_efer2
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movl saved_video_mode, %edx
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movl %edx, video_mode - wakeup_start (,%rdi)
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movl acpi_video_flags, %edx
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movl %edx, video_flags - wakeup_start (,%rdi)
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movq $0x12345678, real_magic - wakeup_start (,%rdi)
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movq $0x123456789abcdef0, %rdx
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movq %rdx, saved_magic
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movl saved_magic - __START_KERNEL_map, %eax
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cmpl $0x9abcdef0, %eax
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jne bogus_32_magic
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# make sure %cr4 is set correctly (features, etc)
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movl saved_cr4 - __START_KERNEL_map, %eax
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movq %rax, %cr4
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movl saved_cr0 - __START_KERNEL_map, %eax
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movq %rax, %cr0
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jmp 1f # Flush pipelines
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1:
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# restore the regs we used
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popq %rdx
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popq %rcx
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popq %rax
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ENTRY(do_suspend_lowlevel_s4bios)
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ret
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.align 2
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.p2align 4,,15
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.globl do_suspend_lowlevel
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.type do_suspend_lowlevel,@function
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do_suspend_lowlevel:
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.LFB5:
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subq $8, %rsp
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xorl %eax, %eax
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call save_processor_state
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movq %rsp, saved_context_esp(%rip)
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movq %rax, saved_context_eax(%rip)
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movq %rbx, saved_context_ebx(%rip)
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movq %rcx, saved_context_ecx(%rip)
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movq %rdx, saved_context_edx(%rip)
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movq %rbp, saved_context_ebp(%rip)
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movq %rsi, saved_context_esi(%rip)
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movq %rdi, saved_context_edi(%rip)
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movq %r8, saved_context_r08(%rip)
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movq %r9, saved_context_r09(%rip)
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movq %r10, saved_context_r10(%rip)
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movq %r11, saved_context_r11(%rip)
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movq %r12, saved_context_r12(%rip)
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movq %r13, saved_context_r13(%rip)
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movq %r14, saved_context_r14(%rip)
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movq %r15, saved_context_r15(%rip)
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pushfq ; popq saved_context_eflags(%rip)
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movq $.L97, saved_eip(%rip)
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movq %rsp,saved_esp
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movq %rbp,saved_ebp
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movq %rbx,saved_ebx
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movq %rdi,saved_edi
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movq %rsi,saved_esi
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addq $8, %rsp
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movl $3, %edi
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xorl %eax, %eax
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jmp acpi_enter_sleep_state
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.L97:
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.p2align 4,,7
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.L99:
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.align 4
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movl $24, %eax
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movw %ax, %ds
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movq saved_context+58(%rip), %rax
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movq %rax, %cr4
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movq saved_context+50(%rip), %rax
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movq %rax, %cr3
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movq saved_context+42(%rip), %rax
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movq %rax, %cr2
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movq saved_context+34(%rip), %rax
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movq %rax, %cr0
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pushq saved_context_eflags(%rip) ; popfq
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movq saved_context_esp(%rip), %rsp
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movq saved_context_ebp(%rip), %rbp
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movq saved_context_eax(%rip), %rax
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movq saved_context_ebx(%rip), %rbx
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movq saved_context_ecx(%rip), %rcx
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movq saved_context_edx(%rip), %rdx
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movq saved_context_esi(%rip), %rsi
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movq saved_context_edi(%rip), %rdi
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movq saved_context_r08(%rip), %r8
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movq saved_context_r09(%rip), %r9
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movq saved_context_r10(%rip), %r10
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movq saved_context_r11(%rip), %r11
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movq saved_context_r12(%rip), %r12
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movq saved_context_r13(%rip), %r13
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movq saved_context_r14(%rip), %r14
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movq saved_context_r15(%rip), %r15
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xorl %eax, %eax
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addq $8, %rsp
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jmp restore_processor_state
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.LFE5:
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.Lfe5:
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.size do_suspend_lowlevel,.Lfe5-do_suspend_lowlevel
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.data
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ALIGN
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ENTRY(saved_ebp) .quad 0
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ENTRY(saved_esi) .quad 0
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ENTRY(saved_edi) .quad 0
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ENTRY(saved_ebx) .quad 0
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ENTRY(saved_eip) .quad 0
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ENTRY(saved_esp) .quad 0
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ENTRY(saved_magic) .quad 0
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ALIGN
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# saved registers
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saved_gdt: .quad 0,0
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saved_idt: .quad 0,0
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saved_ldt: .quad 0
|
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saved_tss: .quad 0
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saved_cr0: .quad 0
|
|
saved_cr3: .quad 0
|
|
saved_cr4: .quad 0
|
|
saved_efer: .quad 0
|
|
saved_efer2: .quad 0
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