9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
27 lines
601 B
C
27 lines
601 B
C
/*
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* include/asm-xtensa/smp.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_SMP_H
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#define _XTENSA_SMP_H
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extern struct xtensa_cpuinfo boot_cpu_data;
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#define cpu_data (&boot_cpu_data)
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#define current_cpu_data boot_cpu_data
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struct xtensa_cpuinfo {
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unsigned long *pgd_cache;
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unsigned long *pte_cache;
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unsigned long pgtable_cache_sz;
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};
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#define cpu_logical_map(cpu) (cpu)
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#endif /* _XTENSA_SMP_H */
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