powerpc fixes for 6.0 #2
- Ensure we never emit lwarx with EH=1 on 32-bit, because some 32-bit CPUs trap on it
rather than ignoring it as they should.
- Fix ftrace when building with clang, which was broken by some refactoring.
- A couple of other minor fixes.
Thanks to: Christophe Leroy, Naveen N. Rao, Nick Desaulniers, Ondrej Mosnacek, Pali Rohár,
Russell Currey Segher Boessenkool.
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Merge tag 'powerpc-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
- Ensure we never emit lwarx with EH=1 on 32-bit, because some 32-bit
CPUs trap on it rather than ignoring it as they should.
- Fix ftrace when building with clang, which was broken by some
refactoring.
- A couple of other minor fixes.
Thanks to Christophe Leroy, Naveen N. Rao, Nick Desaulniers, Ondrej
Mosnacek, Pali Rohár, Russell Currey, and Segher Boessenkool.
* tag 'powerpc-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/kexec: Fix build failure from uninitialised variable
powerpc/ppc-opcode: Fix PPC_RAW_TW()
powerpc64/ftrace: Fix ftrace for clang builds
powerpc: Make eh value more explicit when using lwarx
powerpc: Don't hide eh field of lwarx behind a macro
powerpc: Fix eh field when calling lwarx on PPC32
This commit is contained in:
Linus Torvalds
commit
d785610f05
6 changed files with 25 additions and 30 deletions
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@ -140,9 +140,10 @@ static __always_inline bool
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arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
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{
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int r, o = *old;
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unsigned int eh = IS_ENABLED(CONFIG_PPC64);
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2,%5 # atomic_try_cmpxchg_acquire \n"
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"1: lwarx %0,0,%2,%[eh] # atomic_try_cmpxchg_acquire \n"
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" cmpw 0,%0,%3 \n"
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" bne- 2f \n"
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" stwcx. %4,0,%2 \n"
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@ -150,7 +151,7 @@ arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
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"\t" PPC_ACQUIRE_BARRIER " \n"
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"2: \n"
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: "=&r" (r), "+m" (v->counter)
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: "r" (&v->counter), "r" (o), "r" (new), "i" (IS_ENABLED(CONFIG_PPC64) ? 1 : 0)
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: "r" (&v->counter), "r" (o), "r" (new), [eh] "n" (eh)
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: "cr0", "memory");
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if (unlikely(r != o))
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@ -163,7 +163,7 @@ static inline unsigned long fn( \
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"bne- 1b\n" \
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postfix \
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: "=&r" (old), "=&r" (t) \
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: "rK" (mask), "r" (p), "i" (IS_ENABLED(CONFIG_PPC64) ? eh : 0) \
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: "rK" (mask), "r" (p), "n" (eh) \
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: "cc", "memory"); \
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return (old & mask); \
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}
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@ -171,7 +171,7 @@ static inline unsigned long fn( \
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DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,
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PPC_ATOMIC_EXIT_BARRIER, 0)
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DEFINE_TESTOP(test_and_set_bits_lock, or, "",
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PPC_ACQUIRE_BARRIER, 1)
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PPC_ACQUIRE_BARRIER, IS_ENABLED(CONFIG_PPC64))
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DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
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PPC_ATOMIC_EXIT_BARRIER, 0)
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@ -343,6 +343,7 @@
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#define __PPC_SPR(r) ((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11))
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#define __PPC_RC21 (0x1 << 10)
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#define __PPC_PRFX_R(r) (((r) & 0x1) << 20)
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#define __PPC_EH(eh) (((eh) & 0x1) << 0)
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/*
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* Both low and high 16 bits are added as SIGNED additions, so if low 16 bits
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@ -359,16 +360,6 @@
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#define PPC_LI_MASK 0x03fffffc
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#define PPC_LI(v) ((v) & PPC_LI_MASK)
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/*
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* Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
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* larx with EH set as an illegal instruction.
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*/
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#ifdef CONFIG_PPC64
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#define __PPC_EH(eh) (((eh) & 0x1) << 0)
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#else
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#define __PPC_EH(eh) 0
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#endif
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/* Base instruction encoding */
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#define PPC_RAW_CP_ABORT (0x7c00068c)
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#define PPC_RAW_COPY(a, b) (PPC_INST_COPY | ___PPC_RA(a) | ___PPC_RB(b))
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@ -580,7 +571,7 @@
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#define PPC_RAW_BRANCH(offset) (0x48000000 | PPC_LI(offset))
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#define PPC_RAW_BL(offset) (0x48000001 | PPC_LI(offset))
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#define PPC_RAW_TW(t0, a, b) (0x7f000008 | ___PPC_RS(t0) | ___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_RAW_TW(t0, a, b) (0x7c000008 | ___PPC_RS(t0) | ___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_RAW_TRAP() PPC_RAW_TW(31, 0, 0)
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#define PPC_RAW_SETB(t, bfa) (0x7c000100 | ___PPC_RT(t) | ___PPC_RA((bfa) << 2))
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@ -48,10 +48,11 @@ static inline int arch_spin_is_locked(arch_spinlock_t *lock)
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static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
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{
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unsigned long tmp, token;
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unsigned int eh = IS_ENABLED(CONFIG_PPC64);
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token = LOCK_TOKEN;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2,1\n\
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"1: lwarx %0,0,%2,%[eh]\n\
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cmpwi 0,%0,0\n\
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bne- 2f\n\
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stwcx. %1,0,%2\n\
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@ -59,7 +60,7 @@ static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
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PPC_ACQUIRE_BARRIER
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"2:"
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: "=&r" (tmp)
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: "r" (token), "r" (&lock->slock)
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: "r" (token), "r" (&lock->slock), [eh] "n" (eh)
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: "cr0", "memory");
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return tmp;
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@ -156,9 +157,10 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
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static inline long __arch_read_trylock(arch_rwlock_t *rw)
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{
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long tmp;
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unsigned int eh = IS_ENABLED(CONFIG_PPC64);
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__asm__ __volatile__(
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"1: lwarx %0,0,%1,1\n"
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"1: lwarx %0,0,%1,%[eh]\n"
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__DO_SIGN_EXTEND
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" addic. %0,%0,1\n\
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ble- 2f\n"
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@ -166,7 +168,7 @@ static inline long __arch_read_trylock(arch_rwlock_t *rw)
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bne- 1b\n"
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PPC_ACQUIRE_BARRIER
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"2:" : "=&r" (tmp)
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: "r" (&rw->lock)
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: "r" (&rw->lock), [eh] "n" (eh)
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: "cr0", "xer", "memory");
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return tmp;
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@ -179,17 +181,18 @@ static inline long __arch_read_trylock(arch_rwlock_t *rw)
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static inline long __arch_write_trylock(arch_rwlock_t *rw)
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{
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long tmp, token;
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unsigned int eh = IS_ENABLED(CONFIG_PPC64);
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token = WRLOCK_TOKEN;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2,1\n\
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"1: lwarx %0,0,%2,%[eh]\n\
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cmpwi 0,%0,0\n\
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bne- 2f\n"
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" stwcx. %1,0,%2\n\
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bne- 1b\n"
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PPC_ACQUIRE_BARRIER
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"2:" : "=&r" (tmp)
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: "r" (token), "r" (&rw->lock)
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: "r" (token), "r" (&rw->lock), [eh] "n" (eh)
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: "cr0", "memory");
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return tmp;
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@ -393,11 +393,11 @@ int ftrace_make_nop(struct module *mod,
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*/
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static bool expected_nop_sequence(void *ip, ppc_inst_t op0, ppc_inst_t op1)
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{
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if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V1))
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if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS))
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return ppc_inst_equal(op0, ppc_inst(PPC_RAW_NOP()));
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else
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return ppc_inst_equal(op0, ppc_inst(PPC_RAW_BRANCH(8))) &&
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ppc_inst_equal(op1, ppc_inst(PPC_INST_LD_TOC));
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else
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return ppc_inst_equal(op0, ppc_inst(PPC_RAW_NOP()));
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}
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static int
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@ -412,7 +412,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
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if (copy_inst_from_kernel_nofault(op, ip))
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return -EFAULT;
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if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V1) &&
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if (!IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS) &&
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copy_inst_from_kernel_nofault(op + 1, ip + 4))
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return -EFAULT;
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@ -1043,17 +1043,17 @@ static int copy_property(void *fdt, int node_offset, const struct device_node *d
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const char *propname)
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{
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const void *prop, *fdtprop;
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int len = 0, fdtlen = 0, ret;
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int len = 0, fdtlen = 0;
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prop = of_get_property(dn, propname, &len);
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fdtprop = fdt_getprop(fdt, node_offset, propname, &fdtlen);
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if (fdtprop && !prop)
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ret = fdt_delprop(fdt, node_offset, propname);
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return fdt_delprop(fdt, node_offset, propname);
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else if (prop)
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ret = fdt_setprop(fdt, node_offset, propname, prop, len);
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return ret;
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return fdt_setprop(fdt, node_offset, propname, prop, len);
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else
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return -FDT_ERR_NOTFOUND;
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}
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static int update_pci_dma_nodes(void *fdt, const char *dmapropname)
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