Merge branch 'linus' into cpus4096

Conflicts:

	kernel/stop_machine.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Ingo Molnar 2008-07-28 23:32:00 +02:00
commit 9e3ee1c39c
911 changed files with 20231 additions and 11748 deletions

View file

@ -528,7 +528,33 @@ See more details on the proper patch format in the following
references.
16) Sending "git pull" requests (from Linus emails)
Please write the git repo address and branch name alone on the same line
so that I can't even by mistake pull from the wrong branch, and so
that a triple-click just selects the whole thing.
So the proper format is something along the lines of:
"Please pull from
git://jdelvare.pck.nerim.net/jdelvare-2.6 i2c-for-linus
to get these changes:"
so that I don't have to hunt-and-peck for the address and inevitably
get it wrong (actually, I've only gotten it wrong a few times, and
checking against the diffstat tells me when I get it wrong, but I'm
just a lot more comfortable when I don't have to "look for" the right
thing to pull, and double-check that I have the right branch-name).
Please use "git diff -M --stat --summary" to generate the diffstat:
the -M enables rename detection, and the summary enables a summary of
new/deleted or renamed files.
With rename detection, the statistics are rather different [...]
because git will notice that a fair number of the changes are renames.
-----------------------------------
SECTION 2 - HINTS, TIPS, AND TRICKS

View file

@ -47,6 +47,30 @@ Who: Mauro Carvalho Chehab <mchehab@infradead.org>
---------------------------
What: old tuner-3036 i2c driver
When: 2.6.28
Why: This driver is for VERY old i2c-over-parallel port teletext receiver
boxes. Rather then spending effort on converting this driver to V4L2,
and since it is extremely unlikely that anyone still uses one of these
devices, it was decided to drop it.
Who: Hans Verkuil <hverkuil@xs4all.nl>
Mauro Carvalho Chehab <mchehab@infradead.org>
---------------------------
What: V4L2 dpc7146 driver
When: 2.6.28
Why: Old driver for the dpc7146 demonstration board that is no longer
relevant. The last time this was tested on actual hardware was
probably around 2002. Since this is a driver for a demonstration
board the decision was made to remove it rather than spending a
lot of effort continually updating this driver to stay in sync
with the latest internal V4L2 or I2C API.
Who: Hans Verkuil <hverkuil@xs4all.nl>
Mauro Carvalho Chehab <mchehab@infradead.org>
---------------------------
What: PCMCIA control ioctl (needed for pcmcia-cs [cardmgr, cardctl])
When: November 2005
Files: drivers/pcmcia/: pcmcia_ioctl.c

View file

@ -0,0 +1,281 @@
Upgrading I2C Drivers to the new 2.6 Driver Model
=================================================
Ben Dooks <ben-linux@fluff.org>
Introduction
------------
This guide outlines how to alter existing Linux 2.6 client drivers from
the old to the new new binding methods.
Example old-style driver
------------------------
struct example_state {
struct i2c_client client;
....
};
static struct i2c_driver example_driver;
static unsigned short ignore[] = { I2C_CLIENT_END };
static unsigned short normal_addr[] = { OUR_ADDR, I2C_CLIENT_END };
I2C_CLIENT_INSMOD;
static int example_attach(struct i2c_adapter *adap, int addr, int kind)
{
struct example_state *state;
struct device *dev = &adap->dev; /* to use for dev_ reports */
int ret;
state = kzalloc(sizeof(struct example_state), GFP_KERNEL);
if (state == NULL) {
dev_err(dev, "failed to create our state\n");
return -ENOMEM;
}
example->client.addr = addr;
example->client.flags = 0;
example->client.adapter = adap;
i2c_set_clientdata(&state->i2c_client, state);
strlcpy(client->i2c_client.name, "example", I2C_NAME_SIZE);
ret = i2c_attach_client(&state->i2c_client);
if (ret < 0) {
dev_err(dev, "failed to attach client\n");
kfree(state);
return ret;
}
dev = &state->i2c_client.dev;
/* rest of the initialisation goes here. */
dev_info(dev, "example client created\n");
return 0;
}
static int __devexit example_detach(struct i2c_client *client)
{
struct example_state *state = i2c_get_clientdata(client);
i2c_detach_client(client);
kfree(state);
return 0;
}
static int example_attach_adapter(struct i2c_adapter *adap)
{
return i2c_probe(adap, &addr_data, example_attach);
}
static struct i2c_driver example_driver = {
.driver = {
.owner = THIS_MODULE,
.name = "example",
},
.attach_adapter = example_attach_adapter,
.detach_client = __devexit_p(example_detach),
.suspend = example_suspend,
.resume = example_resume,
};
Updating the client
-------------------
The new style binding model will check against a list of supported
devices and their associated address supplied by the code registering
the busses. This means that the driver .attach_adapter and
.detach_adapter methods can be removed, along with the addr_data,
as follows:
- static struct i2c_driver example_driver;
- static unsigned short ignore[] = { I2C_CLIENT_END };
- static unsigned short normal_addr[] = { OUR_ADDR, I2C_CLIENT_END };
- I2C_CLIENT_INSMOD;
- static int example_attach_adapter(struct i2c_adapter *adap)
- {
- return i2c_probe(adap, &addr_data, example_attach);
- }
static struct i2c_driver example_driver = {
- .attach_adapter = example_attach_adapter,
- .detach_client = __devexit_p(example_detach),
}
Add the probe and remove methods to the i2c_driver, as so:
static struct i2c_driver example_driver = {
+ .probe = example_probe,
+ .remove = __devexit_p(example_remove),
}
Change the example_attach method to accept the new parameters
which include the i2c_client that it will be working with:
- static int example_attach(struct i2c_adapter *adap, int addr, int kind)
+ static int example_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
Change the name of example_attach to example_probe to align it with the
i2c_driver entry names. The rest of the probe routine will now need to be
changed as the i2c_client has already been setup for use.
The necessary client fields have already been setup before
the probe function is called, so the following client setup
can be removed:
- example->client.addr = addr;
- example->client.flags = 0;
- example->client.adapter = adap;
-
- strlcpy(client->i2c_client.name, "example", I2C_NAME_SIZE);
The i2c_set_clientdata is now:
- i2c_set_clientdata(&state->client, state);
+ i2c_set_clientdata(client, state);
The call to i2c_attach_client is no longer needed, if the probe
routine exits successfully, then the driver will be automatically
attached by the core. Change the probe routine as so:
- ret = i2c_attach_client(&state->i2c_client);
- if (ret < 0) {
- dev_err(dev, "failed to attach client\n");
- kfree(state);
- return ret;
- }
Remove the storage of 'struct i2c_client' from the 'struct example_state'
as we are provided with the i2c_client in our example_probe. Instead we
store a pointer to it for when it is needed.
struct example_state {
- struct i2c_client client;
+ struct i2c_client *client;
the new i2c client as so:
- struct device *dev = &adap->dev; /* to use for dev_ reports */
+ struct device *dev = &i2c_client->dev; /* to use for dev_ reports */
And remove the change after our client is attached, as the driver no
longer needs to register a new client structure with the core:
- dev = &state->i2c_client.dev;
In the probe routine, ensure that the new state has the client stored
in it:
static int example_probe(struct i2c_client *i2c_client,
const struct i2c_device_id *id)
{
struct example_state *state;
struct device *dev = &i2c_client->dev;
int ret;
state = kzalloc(sizeof(struct example_state), GFP_KERNEL);
if (state == NULL) {
dev_err(dev, "failed to create our state\n");
return -ENOMEM;
}
+ state->client = i2c_client;
Update the detach method, by changing the name to _remove and
to delete the i2c_detach_client call. It is possible that you
can also remove the ret variable as it is not not needed for
any of the core functions.
- static int __devexit example_detach(struct i2c_client *client)
+ static int __devexit example_remove(struct i2c_client *client)
{
struct example_state *state = i2c_get_clientdata(client);
- i2c_detach_client(client);
And finally ensure that we have the correct ID table for the i2c-core
and other utilities:
+ struct i2c_device_id example_idtable[] = {
+ { "example", 0 },
+ { }
+};
+
+MODULE_DEVICE_TABLE(i2c, example_idtable);
static struct i2c_driver example_driver = {
.driver = {
.owner = THIS_MODULE,
.name = "example",
},
+ .id_table = example_ids,
Our driver should now look like this:
struct example_state {
struct i2c_client *client;
....
};
static int example_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct example_state *state;
struct device *dev = &client->dev;
state = kzalloc(sizeof(struct example_state), GFP_KERNEL);
if (state == NULL) {
dev_err(dev, "failed to create our state\n");
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
dev_info(dev, "example client created\n");
return 0;
}
static int __devexit example_remove(struct i2c_client *client)
{
struct example_state *state = i2c_get_clientdata(client);
kfree(state);
return 0;
}
static struct i2c_device_id example_idtable[] = {
{ "example", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, example_idtable);
static struct i2c_driver example_driver = {
.driver = {
.owner = THIS_MODULE,
.name = "example",
},
.id_table = example_idtable,
.probe = example_probe,
.remove = __devexit_p(example_remove),
.suspend = example_suspend,
.resume = example_resume,
};

View file

@ -2,3 +2,4 @@
1 -> Hauppauge HVR950Q (au0828) [2040:7200,2040:7210,2040:7217,2040:721b,2040:721f,2040:7280,0fd9:0008]
2 -> Hauppauge HVR850 (au0828) [2040:7240]
3 -> DViCO FusionHDTV USB (au0828) [0fe9:d620]
4 -> Hauppauge HVR950Q rev xxF8 (au0828) [2040:7201,2040:7211,2040:7281]

View file

@ -1,11 +1,11 @@
0 -> Unknown EM2800 video grabber (em2800) [eb1a:2800]
1 -> Unknown EM2750/28xx video grabber (em2820/em2840) [eb1a:2750,eb1a:2820,eb1a:2821,eb1a:2860,eb1a:2861,eb1a:2870,eb1a:2881,eb1a:2883]
1 -> Unknown EM2750/28xx video grabber (em2820/em2840) [eb1a:2820,eb1a:2821,eb1a:2860,eb1a:2861,eb1a:2870,eb1a:2881,eb1a:2883]
2 -> Terratec Cinergy 250 USB (em2820/em2840) [0ccd:0036]
3 -> Pinnacle PCTV USB 2 (em2820/em2840) [2304:0208]
4 -> Hauppauge WinTV USB 2 (em2820/em2840) [2040:4200,2040:4201]
5 -> MSI VOX USB 2.0 (em2820/em2840)
6 -> Terratec Cinergy 200 USB (em2800)
7 -> Leadtek Winfast USB II (em2800)
7 -> Leadtek Winfast USB II (em2800) [0413:6023]
8 -> Kworld USB2800 (em2800)
9 -> Pinnacle Dazzle DVC 90/DVC 100 (em2820/em2840) [2304:0207,2304:021a]
10 -> Hauppauge WinTV HVR 900 (em2880) [2040:6500]
@ -14,7 +14,46 @@
13 -> Terratec Prodigy XS (em2880) [0ccd:0047]
14 -> Pixelview Prolink PlayTV USB 2.0 (em2820/em2840)
15 -> V-Gear PocketTV (em2800)
16 -> Hauppauge WinTV HVR 950 (em2880) [2040:6513,2040:6517,2040:651b,2040:651f]
16 -> Hauppauge WinTV HVR 950 (em2883) [2040:6513,2040:6517,2040:651b,2040:651f]
17 -> Pinnacle PCTV HD Pro Stick (em2880) [2304:0227]
18 -> Hauppauge WinTV HVR 900 (R2) (em2880) [2040:6502]
19 -> PointNix Intra-Oral Camera (em2860)
20 -> AMD ATI TV Wonder HD 600 (em2880) [0438:b002]
21 -> eMPIA Technology, Inc. GrabBeeX+ Video Encoder (em2800) [eb1a:2801]
22 -> Unknown EM2750/EM2751 webcam grabber (em2750) [eb1a:2750,eb1a:2751]
23 -> Huaqi DLCW-130 (em2750)
24 -> D-Link DUB-T210 TV Tuner (em2820/em2840) [2001:f112]
25 -> Gadmei UTV310 (em2820/em2840)
26 -> Hercules Smart TV USB 2.0 (em2820/em2840)
27 -> Pinnacle PCTV USB 2 (Philips FM1216ME) (em2820/em2840)
28 -> Leadtek Winfast USB II Deluxe (em2820/em2840)
29 -> Pinnacle Dazzle DVC 100 (em2820/em2840)
30 -> Videology 20K14XUSB USB2.0 (em2820/em2840)
31 -> Usbgear VD204v9 (em2821)
32 -> Supercomp USB 2.0 TV (em2821)
33 -> SIIG AVTuner-PVR/Prolink PlayTV USB 2.0 (em2821)
34 -> Terratec Cinergy A Hybrid XS (em2860) [0ccd:004f]
35 -> Typhoon DVD Maker (em2860)
36 -> NetGMBH Cam (em2860)
37 -> Gadmei UTV330 (em2860)
38 -> Yakumo MovieMixer (em2861)
39 -> KWorld PVRTV 300U (em2861) [eb1a:e300]
40 -> Plextor ConvertX PX-TV100U (em2861) [093b:a005]
41 -> Kworld 350 U DVB-T (em2870) [eb1a:e350]
42 -> Kworld 355 U DVB-T (em2870) [eb1a:e355,eb1a:e357]
43 -> Terratec Cinergy T XS (em2870) [0ccd:0043]
44 -> Terratec Cinergy T XS (MT2060) (em2870)
45 -> Pinnacle PCTV DVB-T (em2870)
46 -> Compro, VideoMate U3 (em2870) [185b:2870]
47 -> KWorld DVB-T 305U (em2880) [eb1a:e305]
48 -> KWorld DVB-T 310U (em2880)
49 -> MSI DigiVox A/D (em2880) [eb1a:e310]
50 -> MSI DigiVox A/D II (em2880) [eb1a:e320]
51 -> Terratec Hybrid XS Secam (em2880) [0ccd:004c]
52 -> DNT DA2 Hybrid (em2881)
53 -> Pinnacle Hybrid Pro (em2881)
54 -> Kworld VS-DVB-T 323UR (em2882) [eb1a:e323]
55 -> Terratec Hybrid XS (em2882) (em2882) [0ccd:005e]
56 -> Pinnacle Hybrid Pro (2) (em2882) [2304:0226]
57 -> Kworld PlusTV HD Hybrid 330 (em2883) [eb1a:a316]
58 -> Compro VideoMate ForYou/Stereo (em2820/em2840) [185b:2041]

View file

@ -1,4 +1,4 @@
List of the webcams know by gspca.
List of the webcams known by gspca.
The modules are:
gspca_main main driver

View file

@ -3796,6 +3796,12 @@ P: Ben Nizette
M: bn@niasdigital.com
S: Maintained
SOC-CAMERA V4L2 SUBSYSTEM
P: Guennadi Liakhovetski
M: g.liakhovetski@gmx.de
L: video4linux-list@redhat.com
S: Maintained
SOFTWARE RAID (Multiple Disks) SUPPORT
P: Ingo Molnar
M: mingo@redhat.com

View file

@ -206,7 +206,11 @@ ifeq ($(ARCH),x86_64)
endif
# Where to locate arch specific headers
hdr-arch := $(SRCARCH)
ifeq ($(ARCH),sparc64)
hdr-arch := sparc
else
hdr-arch := $(SRCARCH)
endif
KCONFIG_CONFIG ?= .config

View file

@ -117,6 +117,7 @@ config PPC
select HAVE_KPROBES
select HAVE_ARCH_KGDB
select HAVE_KRETPROBES
select HAVE_ARCH_TRACEHOOK
select HAVE_LMB
select HAVE_DMA_ATTRS if PPC64
select USE_GENERIC_SMP_HELPERS if SMP

View file

@ -148,7 +148,7 @@ transfer_to_handler:
/* Check to see if the dbcr0 register is set up to debug. Use the
internal debug mode bit to do this. */
lwz r12,THREAD_DBCR0(r12)
andis. r12,r12,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
andis. r12,r12,DBCR0_IDM@h
beq+ 3f
/* From user and task is ptraced - load up global dbcr0 */
li r12,-1 /* clear all pending debug events */
@ -292,7 +292,7 @@ syscall_exit_cont:
/* If the process has its own DBCR0 value, load it up. The internal
debug mode bit tells us that dbcr0 should be loaded. */
lwz r0,THREAD+THREAD_DBCR0(r2)
andis. r10,r0,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
andis. r10,r0,DBCR0_IDM@h
bnel- load_dbcr0
#endif
#ifdef CONFIG_44x
@ -343,7 +343,12 @@ syscall_dotrace:
stw r0,_TRAP(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
bl do_syscall_trace_enter
lwz r0,GPR0(r1) /* Restore original registers */
/*
* Restore argument registers possibly just changed.
* We use the return value of do_syscall_trace_enter
* for call number to look up in the table (r0).
*/
mr r0,r3
lwz r3,GPR3(r1)
lwz r4,GPR4(r1)
lwz r5,GPR5(r1)
@ -720,7 +725,7 @@ restore_user:
/* Check whether this process has its own DBCR0 value. The internal
debug mode bit tells us that dbcr0 should be loaded. */
lwz r0,THREAD+THREAD_DBCR0(r2)
andis. r10,r0,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
andis. r10,r0,DBCR0_IDM@h
bnel- load_dbcr0
#endif
@ -1055,8 +1060,8 @@ do_user_signal: /* r10 contains MSR_KERNEL here */
SAVE_NVGPRS(r1)
rlwinm r3,r3,0,0,30
stw r3,_TRAP(r1)
2: li r3,0
addi r4,r1,STACK_FRAME_OVERHEAD
2: addi r3,r1,STACK_FRAME_OVERHEAD
mr r4,r9
bl do_signal
REST_NVGPRS(r1)
b recheck

View file

@ -214,7 +214,12 @@ syscall_dotrace:
bl .save_nvgprs
addi r3,r1,STACK_FRAME_OVERHEAD
bl .do_syscall_trace_enter
ld r0,GPR0(r1) /* Restore original registers */
/*
* Restore argument registers possibly just changed.
* We use the return value of do_syscall_trace_enter
* for the call number to look up in the table (r0).
*/
mr r0,r3
ld r3,GPR3(r1)
ld r4,GPR4(r1)
ld r5,GPR5(r1)
@ -638,8 +643,7 @@ user_work:
b .ret_from_except_lite
1: bl .save_nvgprs
li r3,0
addi r4,r1,STACK_FRAME_OVERHEAD
addi r3,r1,STACK_FRAME_OVERHEAD
bl .do_signal
b .ret_from_except

View file

@ -493,18 +493,18 @@ static int __init serial_dev_init(void)
device_initcall(serial_dev_init);
#ifdef CONFIG_SERIAL_8250_CONSOLE
/*
* This is called very early, as part of console_init() (typically just after
* time_init()). This function is respondible for trying to find a good
* default console on serial ports. It tries to match the open firmware
* default output with one of the available serial console drivers, either
* one of the platform serial ports that have been probed earlier by
* find_legacy_serial_ports() or some more platform specific ones.
* default output with one of the available serial console drivers that have
* been probed earlier by find_legacy_serial_ports()
*/
static int __init check_legacy_serial_console(void)
{
struct device_node *prom_stdout = NULL;
int speed = 0, offset = 0;
int i, speed = 0, offset = 0;
const char *name;
const u32 *spd;
@ -548,31 +548,20 @@ static int __init check_legacy_serial_console(void)
if (spd)
speed = *spd;
if (0)
;
#ifdef CONFIG_SERIAL_8250_CONSOLE
else if (strcmp(name, "serial") == 0) {
int i;
/* Look for it in probed array */
for (i = 0; i < legacy_serial_count; i++) {
if (prom_stdout != legacy_serial_infos[i].np)
continue;
offset = i;
speed = legacy_serial_infos[i].speed;
break;
}
if (i >= legacy_serial_count)
goto not_found;
}
#endif /* CONFIG_SERIAL_8250_CONSOLE */
#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
else if (strcmp(name, "ch-a") == 0)
offset = 0;
else if (strcmp(name, "ch-b") == 0)
offset = 1;
#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
else
if (strcmp(name, "serial") != 0)
goto not_found;
/* Look for it in probed array */
for (i = 0; i < legacy_serial_count; i++) {
if (prom_stdout != legacy_serial_infos[i].np)
continue;
offset = i;
speed = legacy_serial_infos[i].speed;
break;
}
if (i >= legacy_serial_count)
goto not_found;
of_node_put(prom_stdout);
DBG("Found serial console at ttyS%d\n", offset);
@ -591,3 +580,4 @@ static int __init check_legacy_serial_console(void)
}
console_initcall(check_legacy_serial_console);
#endif /* CONFIG_SERIAL_8250_CONSOLE */

View file

@ -254,7 +254,7 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
return;
/* Clear the DAC and struct entries. One shot trigger */
#if (defined(CONFIG_44x) || defined(CONFIG_BOOKE))
#if defined(CONFIG_BOOKE)
mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | DBSR_DAC1W
| DBCR0_IDM));
#endif
@ -286,7 +286,7 @@ int set_dabr(unsigned long dabr)
mtspr(SPRN_DABR, dabr);
#endif
#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
#if defined(CONFIG_BOOKE)
mtspr(SPRN_DAC1, dabr);
#endif
@ -373,7 +373,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
set_dabr(new->thread.dabr);
#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
#if defined(CONFIG_BOOKE)
/* If new thread DAC (HW breakpoint) is the same then leave it */
if (new->thread.dabr)
set_dabr(new->thread.dabr);
@ -568,7 +568,7 @@ void flush_thread(void)
current->thread.dabr = 0;
set_dabr(0);
#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
#if defined(CONFIG_BOOKE)
current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W);
#endif
}

View file

@ -205,8 +205,6 @@ static int __initdata mem_reserve_cnt;
static cell_t __initdata regbuf[1024];
#define MAX_CPU_THREADS 2
/*
* Error results ... some OF calls will return "-1" on error, some
* will return 0, some will return either. To simplify, here are
@ -1339,10 +1337,6 @@ static void __init prom_hold_cpus(void)
unsigned int reg;
phandle node;
char type[64];
int cpuid = 0;
unsigned int interrupt_server[MAX_CPU_THREADS];
unsigned int cpu_threads, hw_cpu_num;
int propsize;
struct prom_t *_prom = &RELOC(prom);
unsigned long *spinloop
= (void *) LOW_ADDR(__secondary_hold_spinloop);
@ -1386,7 +1380,6 @@ static void __init prom_hold_cpus(void)
reg = -1;
prom_getprop(node, "reg", &reg, sizeof(reg));
prom_debug("\ncpuid = 0x%x\n", cpuid);
prom_debug("cpu hw idx = 0x%x\n", reg);
/* Init the acknowledge var which will be reset by
@ -1395,28 +1388,9 @@ static void __init prom_hold_cpus(void)
*/
*acknowledge = (unsigned long)-1;
propsize = prom_getprop(node, "ibm,ppc-interrupt-server#s",
&interrupt_server,
sizeof(interrupt_server));
if (propsize < 0) {
/* no property. old hardware has no SMT */
cpu_threads = 1;
interrupt_server[0] = reg; /* fake it with phys id */
} else {
/* We have a threaded processor */
cpu_threads = propsize / sizeof(u32);
if (cpu_threads > MAX_CPU_THREADS) {
prom_printf("SMT: too many threads!\n"
"SMT: found %x, max is %x\n",
cpu_threads, MAX_CPU_THREADS);
cpu_threads = 1; /* ToDo: panic? */
}
}
hw_cpu_num = interrupt_server[0];
if (hw_cpu_num != _prom->cpu) {
if (reg != _prom->cpu) {
/* Primary Thread of non-boot cpu */
prom_printf("%x : starting cpu hw idx %x... ", cpuid, reg);
prom_printf("starting cpu hw idx %x... ", reg);
call_prom("start-cpu", 3, 0, node,
secondary_hold, reg);
@ -1431,17 +1405,10 @@ static void __init prom_hold_cpus(void)
}
#ifdef CONFIG_SMP
else
prom_printf("%x : boot cpu %x\n", cpuid, reg);
prom_printf("boot cpu hw idx %x\n", reg);
#endif /* CONFIG_SMP */
/* Reserve cpu #s for secondary threads. They start later. */
cpuid += cpu_threads;
}
if (cpuid > NR_CPUS)
prom_printf("WARNING: maximum CPUs (" __stringify(NR_CPUS)
") exceeded: ignoring extras\n");
prom_debug("prom_hold_cpus: end...\n");
}

View file

@ -22,6 +22,7 @@
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/regset.h>
#include <linux/tracehook.h>
#include <linux/elf.h>
#include <linux/user.h>
#include <linux/security.h>
@ -717,7 +718,7 @@ void user_disable_single_step(struct task_struct *task)
struct pt_regs *regs = task->thread.regs;
#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
#if defined(CONFIG_BOOKE)
/* If DAC then do not single step, skip */
if (task->thread.dabr)
return;
@ -744,10 +745,11 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
if (addr > 0)
return -EINVAL;
/* The bottom 3 bits in dabr are flags */
if ((data & ~0x7UL) >= TASK_SIZE)
return -EIO;
#ifdef CONFIG_PPC64
#ifndef CONFIG_BOOKE
/* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
* It was assumed, on previous implementations, that 3 bits were
@ -769,7 +771,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
task->thread.dabr = data;
#endif
#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
#if defined(CONFIG_BOOKE)
/* As described above, it was assumed 3 bits were passed with the data
* address, but we will assume only the mode bits will be passed
@ -1013,31 +1015,24 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
return ret;
}
static void do_syscall_trace(void)
/*
* We must return the syscall number to actually look up in the table.
* This can be -1L to skip running any syscall at all.
*/
long do_syscall_trace_enter(struct pt_regs *regs)
{
/* the 0x80 provides a way for the tracing parent to distinguish
between a syscall stop and SIGTRAP delivery */
ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
? 0x80 : 0));
long ret = 0;
/*
* this isn't the same as continuing with a signal, but it will do
* for normal use. strace only continues with a signal if the
* stopping signal is not SIGTRAP. -brl
*/
if (current->exit_code) {
send_sig(current->exit_code, current, 1);
current->exit_code = 0;
}
}
void do_syscall_trace_enter(struct pt_regs *regs)
{
secure_computing(regs->gpr[0]);
if (test_thread_flag(TIF_SYSCALL_TRACE)
&& (current->ptrace & PT_PTRACED))
do_syscall_trace();
if (test_thread_flag(TIF_SYSCALL_TRACE) &&
tracehook_report_syscall_entry(regs))
/*
* Tracing decided this syscall should not happen.
* We'll return a bogus call number to get an ENOSYS
* error, but leave the original number in regs->gpr[0].
*/
ret = -1L;
if (unlikely(current->audit_context)) {
#ifdef CONFIG_PPC64
@ -1055,16 +1050,19 @@ void do_syscall_trace_enter(struct pt_regs *regs)
regs->gpr[5] & 0xffffffff,
regs->gpr[6] & 0xffffffff);
}
return ret ?: regs->gpr[0];
}
void do_syscall_trace_leave(struct pt_regs *regs)
{
int step;
if (unlikely(current->audit_context))
audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
regs->result);
if ((test_thread_flag(TIF_SYSCALL_TRACE)
|| test_thread_flag(TIF_SINGLESTEP))
&& (current->ptrace & PT_PTRACED))
do_syscall_trace();
step = test_thread_flag(TIF_SINGLESTEP);
if (step || test_thread_flag(TIF_SYSCALL_TRACE))
tracehook_report_syscall_exit(regs, step);
}

View file

@ -367,7 +367,6 @@ static void __init cpu_init_thread_core_maps(int tpc)
* setup_cpu_maps - initialize the following cpu maps:
* cpu_possible_map
* cpu_present_map
* cpu_sibling_map
*
* Having the possible map set up early allows us to restrict allocations
* of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
@ -475,29 +474,6 @@ void __init smp_setup_cpu_maps(void)
*/
cpu_init_thread_core_maps(nthreads);
}
/*
* Being that cpu_sibling_map is now a per_cpu array, then it cannot
* be initialized until the per_cpu areas have been created. This
* function is now called from setup_per_cpu_areas().
*/
void __init smp_setup_cpu_sibling_map(void)
{
#ifdef CONFIG_PPC64
int i, cpu, base;
for_each_possible_cpu(cpu) {
DBG("Sibling map for CPU %d:", cpu);
base = cpu_first_thread_in_core(cpu);
for (i = 0; i < threads_per_core; i++) {
cpu_set(base + i, per_cpu(cpu_sibling_map, cpu));
DBG(" %d", base + i);
}
DBG("\n");
}
#endif /* CONFIG_PPC64 */
}
#endif /* CONFIG_SMP */
#ifdef CONFIG_PCSPKR_PLATFORM

View file

@ -611,9 +611,6 @@ void __init setup_per_cpu_areas(void)
paca[i].data_offset = ptr - __per_cpu_start;
memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
}
/* Now that per_cpu is setup, initialize cpu_sibling_map */
smp_setup_cpu_sibling_map();
}
#endif

View file

@ -9,7 +9,7 @@
* this archive for more details.
*/
#include <linux/ptrace.h>
#include <linux/tracehook.h>
#include <linux/signal.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
@ -112,7 +112,7 @@ static void check_syscall_restart(struct pt_regs *regs, struct k_sigaction *ka,
}
}
int do_signal(sigset_t *oldset, struct pt_regs *regs)
static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs)
{
siginfo_t info;
int signr;
@ -147,7 +147,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs)
*/
if (current->thread.dabr) {
set_dabr(current->thread.dabr);
#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
#if defined(CONFIG_BOOKE)
mtspr(SPRN_DBCR0, current->thread.dbcr0);
#endif
}
@ -177,11 +177,28 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs)
* its frame, and we can clear the TLF_RESTORE_SIGMASK flag.
*/
current_thread_info()->local_flags &= ~_TLF_RESTORE_SIGMASK;
/*
* Let tracing know that we've done the handler setup.
*/
tracehook_signal_handler(signr, &info, &ka, regs,
test_thread_flag(TIF_SINGLESTEP));
}
return ret;
}
void do_signal(struct pt_regs *regs, unsigned long thread_info_flags)
{
if (thread_info_flags & _TIF_SIGPENDING)
do_signal_pending(NULL, regs);
if (thread_info_flags & _TIF_NOTIFY_RESUME) {
clear_thread_flag(TIF_NOTIFY_RESUME);
tracehook_notify_resume(regs);
}
}
long sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
unsigned long r5, unsigned long r6, unsigned long r7,
unsigned long r8, struct pt_regs *regs)

View file

@ -41,6 +41,7 @@
#include <asm/smp.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/cputhreads.h>
#include <asm/cputable.h>
#include <asm/system.h>
#include <asm/mpic.h>
@ -62,10 +63,12 @@ struct thread_info *secondary_ti;
cpumask_t cpu_possible_map = CPU_MASK_NONE;
cpumask_t cpu_online_map = CPU_MASK_NONE;
DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE;
DEFINE_PER_CPU(cpumask_t, cpu_core_map) = CPU_MASK_NONE;
EXPORT_SYMBOL(cpu_online_map);
EXPORT_SYMBOL(cpu_possible_map);
EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
EXPORT_PER_CPU_SYMBOL(cpu_core_map);
/* SMP operations for this machine */
struct smp_ops_t *smp_ops;
@ -228,6 +231,8 @@ void __devinit smp_prepare_boot_cpu(void)
BUG_ON(smp_processor_id() != boot_cpuid);
cpu_set(boot_cpuid, cpu_online_map);
cpu_set(boot_cpuid, per_cpu(cpu_sibling_map, boot_cpuid));
cpu_set(boot_cpuid, per_cpu(cpu_core_map, boot_cpuid));
#ifdef CONFIG_PPC64
paca[boot_cpuid].__current = current;
#endif
@ -375,11 +380,60 @@ int __cpuinit __cpu_up(unsigned int cpu)
return 0;
}
/* Return the value of the reg property corresponding to the given
* logical cpu.
*/
int cpu_to_core_id(int cpu)
{
struct device_node *np;
const int *reg;
int id = -1;
np = of_get_cpu_node(cpu, NULL);
if (!np)
goto out;
reg = of_get_property(np, "reg", NULL);
if (!reg)
goto out;
id = *reg;
out:
of_node_put(np);
return id;
}
/* Must be called when no change can occur to cpu_present_map,
* i.e. during cpu online or offline.
*/
static struct device_node *cpu_to_l2cache(int cpu)
{
struct device_node *np;
const phandle *php;
phandle ph;
if (!cpu_present(cpu))
return NULL;
np = of_get_cpu_node(cpu, NULL);
if (np == NULL)
return NULL;
php = of_get_property(np, "l2-cache", NULL);
if (php == NULL)
return NULL;
ph = *php;
of_node_put(np);
return of_find_node_by_phandle(ph);
}
/* Activate a secondary processor. */
int __devinit start_secondary(void *unused)
{
unsigned int cpu = smp_processor_id();
struct device_node *l2_cache;
int i, base;
atomic_inc(&init_mm.mm_count);
current->active_mm = &init_mm;
@ -400,6 +454,33 @@ int __devinit start_secondary(void *unused)
ipi_call_lock();
cpu_set(cpu, cpu_online_map);
/* Update sibling maps */
base = cpu_first_thread_in_core(cpu);
for (i = 0; i < threads_per_core; i++) {
if (cpu_is_offline(base + i))
continue;
cpu_set(cpu, per_cpu(cpu_sibling_map, base + i));
cpu_set(base + i, per_cpu(cpu_sibling_map, cpu));
/* cpu_core_map should be a superset of
* cpu_sibling_map even if we don't have cache
* information, so update the former here, too.
*/
cpu_set(cpu, per_cpu(cpu_core_map, base +i));
cpu_set(base + i, per_cpu(cpu_core_map, cpu));
}
l2_cache = cpu_to_l2cache(cpu);
for_each_online_cpu(i) {
struct device_node *np = cpu_to_l2cache(i);
if (!np)
continue;
if (np == l2_cache) {
cpu_set(cpu, per_cpu(cpu_core_map, i));
cpu_set(i, per_cpu(cpu_core_map, cpu));
}
of_node_put(np);
}
of_node_put(l2_cache);
ipi_call_unlock();
local_irq_enable();
@ -437,10 +518,42 @@ void __init smp_cpus_done(unsigned int max_cpus)
#ifdef CONFIG_HOTPLUG_CPU
int __cpu_disable(void)
{
if (smp_ops->cpu_disable)
return smp_ops->cpu_disable();
struct device_node *l2_cache;
int cpu = smp_processor_id();
int base, i;
int err;
return -ENOSYS;
if (!smp_ops->cpu_disable)
return -ENOSYS;
err = smp_ops->cpu_disable();
if (err)
return err;
/* Update sibling maps */
base = cpu_first_thread_in_core(cpu);
for (i = 0; i < threads_per_core; i++) {
cpu_clear(cpu, per_cpu(cpu_sibling_map, base + i));
cpu_clear(base + i, per_cpu(cpu_sibling_map, cpu));
cpu_clear(cpu, per_cpu(cpu_core_map, base +i));
cpu_clear(base + i, per_cpu(cpu_core_map, cpu));
}
l2_cache = cpu_to_l2cache(cpu);
for_each_present_cpu(i) {
struct device_node *np = cpu_to_l2cache(i);
if (!np)
continue;
if (np == l2_cache) {
cpu_clear(cpu, per_cpu(cpu_core_map, i));
cpu_clear(i, per_cpu(cpu_core_map, cpu));
}
of_node_put(np);
}
of_node_put(l2_cache);
return 0;
}
void __cpu_die(unsigned int cpu)

View file

@ -13,7 +13,6 @@
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/stacktrace.h>
#include <linux/module.h>
#include <asm/ptrace.h>
#include <asm/processor.h>

View file

@ -22,6 +22,8 @@
static DEFINE_PER_CPU(struct cpu, cpu_devices);
static DEFINE_PER_CPU(struct kobject *, cache_toplevel);
/* SMT stuff */
#ifdef CONFIG_PPC_MULTIPLATFORM
@ -297,8 +299,289 @@ static struct sysdev_attribute pa6t_attrs[] = {
#endif /* CONFIG_DEBUG_KERNEL */
};
struct cache_desc {
struct kobject kobj;
struct cache_desc *next;
const char *type; /* Instruction, Data, or Unified */
u32 size; /* total cache size in KB */
u32 line_size; /* in bytes */
u32 nr_sets; /* number of sets */
u32 level; /* e.g. 1, 2, 3... */
u32 associativity; /* e.g. 8-way... 0 is fully associative */
};
static void register_cpu_online(unsigned int cpu)
DEFINE_PER_CPU(struct cache_desc *, cache_desc);
static struct cache_desc *kobj_to_cache_desc(struct kobject *k)
{
return container_of(k, struct cache_desc, kobj);
}
static void cache_desc_release(struct kobject *k)
{
struct cache_desc *desc = kobj_to_cache_desc(k);
pr_debug("%s: releasing %s\n", __func__, kobject_name(k));
if (desc->next)
kobject_put(&desc->next->kobj);
kfree(kobj_to_cache_desc(k));
}
static ssize_t cache_desc_show(struct kobject *k, struct attribute *attr, char *buf)
{
struct kobj_attribute *kobj_attr;
kobj_attr = container_of(attr, struct kobj_attribute, attr);
return kobj_attr->show(k, kobj_attr, buf);
}
static struct sysfs_ops cache_desc_sysfs_ops = {
.show = cache_desc_show,
};
static struct kobj_type cache_desc_type = {
.release = cache_desc_release,
.sysfs_ops = &cache_desc_sysfs_ops,
};
static ssize_t cache_size_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%uK\n", cache->size);
}
static struct kobj_attribute cache_size_attr =
__ATTR(size, 0444, cache_size_show, NULL);
static ssize_t cache_line_size_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%u\n", cache->line_size);
}
static struct kobj_attribute cache_line_size_attr =
__ATTR(coherency_line_size, 0444, cache_line_size_show, NULL);
static ssize_t cache_nr_sets_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%u\n", cache->nr_sets);
}
static struct kobj_attribute cache_nr_sets_attr =
__ATTR(number_of_sets, 0444, cache_nr_sets_show, NULL);
static ssize_t cache_type_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%s\n", cache->type);
}
static struct kobj_attribute cache_type_attr =
__ATTR(type, 0444, cache_type_show, NULL);
static ssize_t cache_level_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%u\n", cache->level);
}
static struct kobj_attribute cache_level_attr =
__ATTR(level, 0444, cache_level_show, NULL);
static ssize_t cache_assoc_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%u\n", cache->associativity);
}
static struct kobj_attribute cache_assoc_attr =
__ATTR(ways_of_associativity, 0444, cache_assoc_show, NULL);
struct cache_desc_info {
const char *type;
const char *size_prop;
const char *line_size_prop;
const char *nr_sets_prop;
};
/* PowerPC Processor binding says the [di]-cache-* must be equal on
* unified caches, so just use d-cache properties. */
static struct cache_desc_info ucache_info = {
.type = "Unified",
.size_prop = "d-cache-size",
.line_size_prop = "d-cache-line-size",
.nr_sets_prop = "d-cache-sets",
};
static struct cache_desc_info dcache_info = {
.type = "Data",
.size_prop = "d-cache-size",
.line_size_prop = "d-cache-line-size",
.nr_sets_prop = "d-cache-sets",
};
static struct cache_desc_info icache_info = {
.type = "Instruction",
.size_prop = "i-cache-size",
.line_size_prop = "i-cache-line-size",
.nr_sets_prop = "i-cache-sets",
};
static struct cache_desc * __cpuinit create_cache_desc(struct device_node *np, struct kobject *parent, int index, int level, struct cache_desc_info *info)
{
const u32 *cache_line_size;
struct cache_desc *new;
const u32 *cache_size;
const u32 *nr_sets;
int rc;
new = kzalloc(sizeof(*new), GFP_KERNEL);
if (!new)
return NULL;
rc = kobject_init_and_add(&new->kobj, &cache_desc_type, parent,
"index%d", index);
if (rc)
goto err;
/* type */
new->type = info->type;
rc = sysfs_create_file(&new->kobj, &cache_type_attr.attr);
WARN_ON(rc);
/* level */
new->level = level;
rc = sysfs_create_file(&new->kobj, &cache_level_attr.attr);
WARN_ON(rc);
/* size */
cache_size = of_get_property(np, info->size_prop, NULL);
if (cache_size) {
new->size = *cache_size / 1024;
rc = sysfs_create_file(&new->kobj,
&cache_size_attr.attr);
WARN_ON(rc);
}
/* coherency_line_size */
cache_line_size = of_get_property(np, info->line_size_prop, NULL);
if (cache_line_size) {
new->line_size = *cache_line_size;
rc = sysfs_create_file(&new->kobj,
&cache_line_size_attr.attr);
WARN_ON(rc);
}
/* number_of_sets */
nr_sets = of_get_property(np, info->nr_sets_prop, NULL);
if (nr_sets) {
new->nr_sets = *nr_sets;
rc = sysfs_create_file(&new->kobj,
&cache_nr_sets_attr.attr);
WARN_ON(rc);
}
/* ways_of_associativity */
if (new->nr_sets == 1) {
/* fully associative */
new->associativity = 0;
goto create_assoc;
}
if (new->nr_sets && new->size && new->line_size) {
/* If we have values for all of these we can derive
* the associativity. */
new->associativity =
((new->size * 1024) / new->nr_sets) / new->line_size;
create_assoc:
rc = sysfs_create_file(&new->kobj,
&cache_assoc_attr.attr);
WARN_ON(rc);
}
return new;
err:
kfree(new);
return NULL;
}
static bool cache_is_unified(struct device_node *np)
{
return of_get_property(np, "cache-unified", NULL);
}
static struct cache_desc * __cpuinit create_cache_index_info(struct device_node *np, struct kobject *parent, int index, int level)
{
const phandle *next_cache_phandle;
struct device_node *next_cache;
struct cache_desc *new, **end;
pr_debug("%s(node = %s, index = %d)\n", __func__, np->full_name, index);
if (cache_is_unified(np)) {
new = create_cache_desc(np, parent, index, level,
&ucache_info);
} else {
new = create_cache_desc(np, parent, index, level,
&dcache_info);
if (new) {
index++;
new->next = create_cache_desc(np, parent, index, level,
&icache_info);
}
}
if (!new)
return NULL;
end = &new->next;
while (*end)
end = &(*end)->next;
next_cache_phandle = of_get_property(np, "l2-cache", NULL);
if (!next_cache_phandle)
goto out;
next_cache = of_find_node_by_phandle(*next_cache_phandle);
if (!next_cache)
goto out;
*end = create_cache_index_info(next_cache, parent, ++index, ++level);
of_node_put(next_cache);
out:
return new;
}
static void __cpuinit create_cache_info(struct sys_device *sysdev)
{
struct kobject *cache_toplevel;
struct device_node *np = NULL;
int cpu = sysdev->id;
cache_toplevel = kobject_create_and_add("cache", &sysdev->kobj);
if (!cache_toplevel)
return;
per_cpu(cache_toplevel, cpu) = cache_toplevel;
np = of_get_cpu_node(cpu, NULL);
if (np != NULL) {
per_cpu(cache_desc, cpu) =
create_cache_index_info(np, cache_toplevel, 0, 1);
of_node_put(np);
}
return;
}
static void __cpuinit register_cpu_online(unsigned int cpu)
{
struct cpu *c = &per_cpu(cpu_devices, cpu);
struct sys_device *s = &c->sysdev;
@ -346,9 +629,33 @@ static void register_cpu_online(unsigned int cpu)
if (cpu_has_feature(CPU_FTR_DSCR))
sysdev_create_file(s, &attr_dscr);
create_cache_info(s);
}
#ifdef CONFIG_HOTPLUG_CPU
static void remove_cache_info(struct sys_device *sysdev)
{
struct kobject *cache_toplevel;
struct cache_desc *cache_desc;
int cpu = sysdev->id;
cache_desc = per_cpu(cache_desc, cpu);
if (cache_desc != NULL) {
sysfs_remove_file(&cache_desc->kobj, &cache_size_attr.attr);
sysfs_remove_file(&cache_desc->kobj, &cache_line_size_attr.attr);
sysfs_remove_file(&cache_desc->kobj, &cache_type_attr.attr);
sysfs_remove_file(&cache_desc->kobj, &cache_level_attr.attr);
sysfs_remove_file(&cache_desc->kobj, &cache_nr_sets_attr.attr);
sysfs_remove_file(&cache_desc->kobj, &cache_assoc_attr.attr);
kobject_put(&cache_desc->kobj);
}
cache_toplevel = per_cpu(cache_toplevel, cpu);
if (cache_toplevel != NULL)
kobject_put(cache_toplevel);
}
static void unregister_cpu_online(unsigned int cpu)
{
struct cpu *c = &per_cpu(cpu_devices, cpu);
@ -399,6 +706,8 @@ static void unregister_cpu_online(unsigned int cpu)
if (cpu_has_feature(CPU_FTR_DSCR))
sysdev_remove_file(s, &attr_dscr);
remove_cache_info(s);
}
#endif /* CONFIG_HOTPLUG_CPU */

View file

@ -530,7 +530,7 @@ static dma_addr_t vio_dma_iommu_map_single(struct device *dev, void *vaddr,
}
ret = dma_iommu_ops.map_single(dev, vaddr, size, direction, attrs);
if (unlikely(dma_mapping_error(ret))) {
if (unlikely(dma_mapping_error(dev, ret))) {
vio_cmo_dealloc(viodev, roundup(size, IOMMU_PAGE_SIZE));
atomic_inc(&viodev->cmo.allocs_failed);
}
@ -1031,8 +1031,8 @@ void vio_cmo_set_dev_desired(struct vio_dev *viodev, size_t desired) {}
static int vio_cmo_bus_probe(struct vio_dev *viodev) { return 0; }
static void vio_cmo_bus_remove(struct vio_dev *viodev) {}
static void vio_cmo_set_dma_ops(struct vio_dev *viodev) {}
static void vio_cmo_bus_init() {}
static void vio_cmo_sysfs_init() { }
static void vio_cmo_bus_init(void) {}
static void vio_cmo_sysfs_init(void) { }
#endif /* CONFIG_PPC_SMLPAR */
EXPORT_SYMBOL(vio_cmo_entitlement_update);
EXPORT_SYMBOL(vio_cmo_set_dev_desired);

View file

@ -736,14 +736,21 @@ static int __init hugetlbpage_init(void)
if (!cpu_has_feature(CPU_FTR_16M_PAGE))
return -ENODEV;
/* Add supported huge page sizes. Need to change HUGE_MAX_HSTATE
* and adjust PTE_NONCACHE_NUM if the number of supported huge page
* sizes changes.
*/
set_huge_psize(MMU_PAGE_16M);
set_huge_psize(MMU_PAGE_64K);
set_huge_psize(MMU_PAGE_16G);
/* Temporarily disable support for 64K huge pages when 64K SPU local
* store support is enabled as the current implementation conflicts.
*/
#ifndef CONFIG_SPU_FS_64K_LS
set_huge_psize(MMU_PAGE_64K);
#endif
for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
if (mmu_huge_psizes[psize]) {
huge_pgtable_cache(psize) = kmem_cache_create(

View file

@ -541,6 +541,78 @@ static int __init pmac_declare_of_platform_devices(void)
}
machine_device_initcall(powermac, pmac_declare_of_platform_devices);
#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
/*
* This is called very early, as part of console_init() (typically just after
* time_init()). This function is respondible for trying to find a good
* default console on serial ports. It tries to match the open firmware
* default output with one of the available serial console drivers.
*/
static int __init check_pmac_serial_console(void)
{
struct device_node *prom_stdout = NULL;
int offset = 0;
const char *name;
#ifdef CONFIG_SERIAL_PMACZILOG_TTYS
char *devname = "ttyS";
#else
char *devname = "ttyPZ";
#endif
pr_debug(" -> check_pmac_serial_console()\n");
/* The user has requested a console so this is already set up. */
if (strstr(boot_command_line, "console=")) {
pr_debug(" console was specified !\n");
return -EBUSY;
}
if (!of_chosen) {
pr_debug(" of_chosen is NULL !\n");
return -ENODEV;
}
/* We are getting a weird phandle from OF ... */
/* ... So use the full path instead */
name = of_get_property(of_chosen, "linux,stdout-path", NULL);
if (name == NULL) {
pr_debug(" no linux,stdout-path !\n");
return -ENODEV;
}
prom_stdout = of_find_node_by_path(name);
if (!prom_stdout) {
pr_debug(" can't find stdout package %s !\n", name);
return -ENODEV;
}
pr_debug("stdout is %s\n", prom_stdout->full_name);
name = of_get_property(prom_stdout, "name", NULL);
if (!name) {
pr_debug(" stdout package has no name !\n");
goto not_found;
}
if (strcmp(name, "ch-a") == 0)
offset = 0;
else if (strcmp(name, "ch-b") == 0)
offset = 1;
else
goto not_found;
of_node_put(prom_stdout);
pr_debug("Found serial console at %s%d\n", devname, offset);
return add_preferred_console(devname, offset, NULL);
not_found:
pr_debug("No preferred console found !\n");
of_node_put(prom_stdout);
return -ENODEV;
}
console_initcall(check_pmac_serial_console);
#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/

View file

@ -125,13 +125,23 @@ void udbg_scc_init(int force_scc)
out_8(sccc, 0xc0);
/* If SCC was the OF output port, read the BRG value, else
* Setup for 57600 8N1
* Setup for 38400 or 57600 8N1 depending on the machine
*/
if (ch_def != NULL) {
out_8(sccc, 13);
scc_inittab[1] = in_8(sccc);
out_8(sccc, 12);
scc_inittab[3] = in_8(sccc);
} else if (machine_is_compatible("RackMac1,1")
|| machine_is_compatible("RackMac1,2")
|| machine_is_compatible("MacRISC4")) {
/* Xserves and G5s default to 57600 */
scc_inittab[1] = 0;
scc_inittab[3] = 0;
} else {
/* Others default to 38400 */
scc_inittab[1] = 0;
scc_inittab[3] = 1;
}
for (i = 0; i < sizeof(scc_inittab); ++i)

View file

@ -289,7 +289,9 @@ static int cmm_thread(void *dummy)
}
#define CMM_SHOW(name, format, args...) \
static ssize_t show_##name(struct sys_device *dev, char *buf) \
static ssize_t show_##name(struct sys_device *dev, \
struct sysdev_attribute *attr, \
char *buf) \
{ \
return sprintf(buf, format, ##args); \
} \
@ -298,12 +300,14 @@ static int cmm_thread(void *dummy)
CMM_SHOW(loaned_kb, "%lu\n", PAGES2KB(loaned_pages));
CMM_SHOW(loaned_target_kb, "%lu\n", PAGES2KB(loaned_pages_target));
static ssize_t show_oom_pages(struct sys_device *dev, char *buf)
static ssize_t show_oom_pages(struct sys_device *dev,
struct sysdev_attribute *attr, char *buf)
{
return sprintf(buf, "%lu\n", PAGES2KB(oom_freed_pages));
}
static ssize_t store_oom_pages(struct sys_device *dev,
struct sysdev_attribute *attr,
const char *buf, size_t count)
{
unsigned long val = simple_strtoul (buf, NULL, 10);

View file

@ -197,7 +197,7 @@ void __kprobes arch_arm_kprobe(struct kprobe *p)
args.new = BREAKPOINT_INSTRUCTION;
kcb->kprobe_status = KPROBE_SWAP_INST;
stop_machine_run(swap_instruction, &args, NR_CPUS);
stop_machine(swap_instruction, &args, NULL);
kcb->kprobe_status = status;
}
@ -212,7 +212,7 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
args.new = p->opcode;
kcb->kprobe_status = KPROBE_SWAP_INST;
stop_machine_run(swap_instruction, &args, NR_CPUS);
stop_machine(swap_instruction, &args, NULL);
kcb->kprobe_status = status;
}
@ -331,7 +331,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
* No kprobe at this address. The fault has not been
* caused by a kprobe breakpoint. The race of breakpoint
* vs. kprobe remove does not exist because on s390 we
* use stop_machine_run to arm/disarm the breakpoints.
* use stop_machine to arm/disarm the breakpoints.
*/
goto no_kprobe;

View file

@ -477,6 +477,10 @@ config SH_RTS7751R2D
Select RTS7751R2D if configuring for a Renesas Technology
Sales SH-Graphics board.
config SH_RSK7203
bool "RSK7203"
depends on CPU_SUBTYPE_SH7203
config SH_SDK7780
bool "SDK7780R3"
depends on CPU_SUBTYPE_SH7780
@ -491,6 +495,21 @@ config SH_HIGHLANDER
select SYS_SUPPORTS_PCI
select IO_TRAPPED
config SH_SH7785LCR
bool "SH7785LCR"
depends on CPU_SUBTYPE_SH7785
select SYS_SUPPORTS_PCI
select IO_TRAPPED
config SH_SH7785LCR_29BIT_PHYSMAPS
bool "SH7785LCR 29bit physmaps"
depends on SH_SH7785LCR
default y
help
This board has 2 physical memory maps. It can be changed with
DIP switch(S2-5). If you set the DIP switch for S2-5 = ON,
you can access all on-board device in 29bit address mode.
config SH_MIGOR
bool "Migo-R"
depends on CPU_SUBTYPE_SH7722
@ -498,6 +517,20 @@ config SH_MIGOR
Select Migo-R if configuring for the SH7722 Migo-R platform
by Renesas System Solutions Asia Pte. Ltd.
config SH_AP325RXA
bool "AP-325RXA"
depends on CPU_SUBTYPE_SH7723
help
Renesas "AP-325RXA" support.
Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
config SH_SH7763RDP
bool "SH7763RDP"
depends on CPU_SUBTYPE_SH7763
help
Select SH7763RDP if configuring for a Renesas SH7763
evaluation board.
config SH_EDOSK7705
bool "EDOSK7705"
depends on CPU_SUBTYPE_SH7705
@ -559,6 +592,7 @@ endmenu
source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
source "arch/sh/boards/renesas/r7780rp/Kconfig"
source "arch/sh/boards/renesas/sdk7780/Kconfig"
source "arch/sh/boards/renesas/migor/Kconfig"
source "arch/sh/boards/magicpanelr2/Kconfig"
menu "Timer and clock configuration"

View file

@ -36,7 +36,8 @@ config EARLY_SCIF_CONSOLE_PORT
default "0xff804000" if CPU_SUBTYPE_MXG
default "0xffc30000" if CPU_SUBTYPE_SHX3
default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366
CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
CPU_SUBTYPE_SH7343
default "0xffe80000" if CPU_SH4
default "0xffea0000" if CPU_SUBTYPE_SH7785
default "0xfffe8000" if CPU_SUBTYPE_SH7203

View file

@ -121,6 +121,10 @@ machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp
machdir-$(CONFIG_SH_MIGOR) += renesas/migor
machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780
machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto
machdir-$(CONFIG_SH_RSK7203) += renesas/rsk7203
machdir-$(CONFIG_SH_AP325RXA) += renesas/ap325rxa
machdir-$(CONFIG_SH_SH7763RDP) += renesas/sh7763rdp
machdir-$(CONFIG_SH_SH7785LCR) += renesas/sh7785lcr
machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev
machdir-$(CONFIG_SH_LANDISK) += landisk
machdir-$(CONFIG_SH_TITAN) += titan

View file

@ -30,7 +30,7 @@
*
* Grabs the current RTC seconds counter and adjusts it to the Unix Epoch.
*/
void aica_rtc_gettimeofday(struct timespec *ts)
static void aica_rtc_gettimeofday(struct timespec *ts)
{
unsigned long val1, val2;
@ -54,7 +54,7 @@ void aica_rtc_gettimeofday(struct timespec *ts)
*
* Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter.
*/
int aica_rtc_settimeofday(const time_t secs)
static int aica_rtc_settimeofday(const time_t secs)
{
unsigned long val1, val2;
unsigned long adj = secs + TWENTY_YEARS;

View file

@ -0,0 +1 @@
obj-y := setup.o

View file

@ -0,0 +1,313 @@
/*
* Renesas - AP-325RXA
* (Compatible with Algo System ., LTD. - AP-320A)
*
* Copyright (C) 2008 Renesas Solutions Corp.
* Author : Yusuke Goda <goda.yuske@renesas.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/smc911x.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <asm/sh_mobile_lcdc.h>
#include <asm/io.h>
#include <asm/clock.h>
static struct smc911x_platdata smc911x_info = {
.flags = SMC911X_USE_32BIT,
.irq_flags = IRQF_TRIGGER_LOW,
};
static struct resource smc9118_resources[] = {
[0] = {
.start = 0xb6080000,
.end = 0xb60fffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 35,
.end = 35,
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device smc9118_device = {
.name = "smc911x",
.id = -1,
.num_resources = ARRAY_SIZE(smc9118_resources),
.resource = smc9118_resources,
.dev = {
.platform_data = &smc911x_info,
},
};
static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
{
.name = "uboot",
.offset = 0,
.size = (1 * 1024 * 1024),
.mask_flags = MTD_WRITEABLE, /* Read-only */
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = (2 * 1024 * 1024),
}, {
.name = "other",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data ap325rxa_nor_flash_data = {
.width = 2,
.parts = ap325rxa_nor_flash_partitions,
.nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
};
static struct resource ap325rxa_nor_flash_resources[] = {
[0] = {
.name = "NOR Flash",
.start = 0x00000000,
.end = 0x00ffffff,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device ap325rxa_nor_flash_device = {
.name = "physmap-flash",
.resource = ap325rxa_nor_flash_resources,
.num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
.dev = {
.platform_data = &ap325rxa_nor_flash_data,
},
};
#define FPGA_LCDREG 0xB4100180
#define FPGA_BKLREG 0xB4100212
#define FPGA_LCDREG_VAL 0x0018
#define PORT_PHCR 0xA405010E
#define PORT_PLCR 0xA4050114
#define PORT_PMCR 0xA4050116
#define PORT_PRCR 0xA405011C
#define PORT_PSCR 0xA405011E
#define PORT_PZCR 0xA405014C
#define PORT_HIZCRA 0xA4050158
#define PORT_MSELCRB 0xA4050182
#define PORT_PSDR 0xA405013E
#define PORT_PZDR 0xA405016C
#define PORT_PSELD 0xA4050154
static void ap320_wvga_power_on(void *board_data)
{
msleep(100);
/* ASD AP-320/325 LCD ON */
ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
/* backlight */
ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR);
ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
ctrl_outw(0x100, FPGA_BKLREG);
}
static struct sh_mobile_lcdc_info lcdc_info = {
.clock_source = LCDC_CLK_EXTERNAL,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.bpp = 16,
.interface_type = RGB18,
.clock_divider = 1,
.lcd_cfg = {
.name = "LB070WV1",
.xres = 800,
.yres = 480,
.left_margin = 40,
.right_margin = 160,
.hsync_len = 8,
.upper_margin = 63,
.lower_margin = 80,
.vsync_len = 1,
.sync = 0, /* hsync and vsync are active low */
},
.board_cfg = {
.display_on = ap320_wvga_power_on,
},
}
};
static struct resource lcdc_resources[] = {
[0] = {
.name = "LCDC",
.start = 0xfe940000, /* P4-only space */
.end = 0xfe941fff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device lcdc_device = {
.name = "sh_mobile_lcdc_fb",
.num_resources = ARRAY_SIZE(lcdc_resources),
.resource = lcdc_resources,
.dev = {
.platform_data = &lcdc_info,
},
};
static unsigned char camera_ncm03j_magic[] =
{
0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
};
static int camera_set_capture(struct soc_camera_platform_info *info,
int enable)
{
struct i2c_adapter *a = i2c_get_adapter(0);
struct i2c_msg msg;
int ret = 0;
int i;
if (!enable)
return 0; /* no disable for now */
for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
u_int8_t buf[8];
msg.addr = 0x6e;
msg.buf = buf;
msg.len = 2;
msg.flags = 0;
buf[0] = camera_ncm03j_magic[i];
buf[1] = camera_ncm03j_magic[i + 1];
ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
}
return ret;
}
static struct soc_camera_platform_info camera_info = {
.iface = 0,
.format_name = "UYVY",
.format_depth = 16,
.format = {
.pixelformat = V4L2_PIX_FMT_UYVY,
.colorspace = V4L2_COLORSPACE_SMPTE170M,
.width = 640,
.height = 480,
},
.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
.set_capture = camera_set_capture,
};
static struct platform_device camera_device = {
.name = "soc_camera_platform",
.dev = {
.platform_data = &camera_info,
},
};
static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
.flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
};
static struct resource ceu_resources[] = {
[0] = {
.name = "CEU",
.start = 0xfe910000,
.end = 0xfe91009f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 52,
.flags = IORESOURCE_IRQ,
},
[2] = {
/* place holder for contiguous memory */
},
};
static struct platform_device ceu_device = {
.name = "sh_mobile_ceu",
.num_resources = ARRAY_SIZE(ceu_resources),
.resource = ceu_resources,
.dev = {
.platform_data = &sh_mobile_ceu_info,
},
};
static struct platform_device *ap325rxa_devices[] __initdata = {
&smc9118_device,
&ap325rxa_nor_flash_device,
&lcdc_device,
&ceu_device,
&camera_device,
};
static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
};
static int __init ap325rxa_devices_setup(void)
{
clk_always_enable("mstp200"); /* LCDC */
clk_always_enable("mstp203"); /* CEU */
platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
i2c_register_board_info(0, ap325rxa_i2c_devices,
ARRAY_SIZE(ap325rxa_i2c_devices));
return platform_add_devices(ap325rxa_devices,
ARRAY_SIZE(ap325rxa_devices));
}
device_initcall(ap325rxa_devices_setup);
static void __init ap325rxa_setup(char **cmdline_p)
{
/* LCDC configuration */
ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
/* CEU */
ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
}
static struct sh_machine_vector mv_ap325rxa __initmv = {
.mv_name = "AP-325RXA",
.mv_setup = ap325rxa_setup,
};

View file

@ -0,0 +1,15 @@
if SH_MIGOR
choice
prompt "Migo-R LCD Panel Board Selection"
default SH_MIGOR_QVGA
config SH_MIGOR_QVGA
bool "QVGA (320x240)"
config SH_MIGOR_RTA_WVGA
bool "RTA WVGA (800x480)"
endchoice
endif

View file

@ -1 +1,2 @@
obj-y := setup.o
obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o

View file

@ -0,0 +1,165 @@
/*
* Support for SuperH MigoR Quarter VGA LCD Panel
*
* Copyright (C) 2008 Magnus Damm
*
* Based on lcd_powertip.c from Kenati Technologies Pvt Ltd.
* Copyright (c) 2007 Ujjwal Pande <ujjwal@kenati.com>,
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/sh_mobile_lcdc.h>
#include <asm/migor.h>
/* LCD Module is a PH240320T according to board schematics. This module
* is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?)
* Driver IC. This IC is connected to the SH7722 built-in LCDC using a
* SYS-80 interface configured in 16 bit mode.
*
* Index 0: "Device Code Read" returns 0x1505.
*/
static void reset_lcd_module(void)
{
ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR);
mdelay(2);
ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR);
mdelay(1);
}
/* DB0-DB7 are connected to D1-D8, and DB8-DB15 to D10-D17 */
static unsigned long adjust_reg18(unsigned short data)
{
unsigned long tmp1, tmp2;
tmp1 = (data<<1 | 0x00000001) & 0x000001FF;
tmp2 = (data<<2 | 0x00000200) & 0x0003FE00;
return tmp1 | tmp2;
}
static void write_reg(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
unsigned short reg, unsigned short data)
{
sys_ops->write_index(sys_ops_handle, adjust_reg18(reg << 8 | data));
}
static void write_reg16(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
unsigned short reg, unsigned short data)
{
sys_ops->write_index(sys_ops_handle, adjust_reg18(reg));
sys_ops->write_data(sys_ops_handle, adjust_reg18(data));
}
static unsigned long read_reg16(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
unsigned short reg)
{
unsigned long data;
sys_ops->write_index(sys_ops_handle, adjust_reg18(reg));
data = sys_ops->read_data(sys_ops_handle);
return ((data >> 1) & 0xff) | ((data >> 2) & 0xff00);
}
static void migor_lcd_qvga_seq(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
unsigned short const *data, int no_data)
{
int i;
for (i = 0; i < no_data; i += 2)
write_reg16(sys_ops_handle, sys_ops, data[i], data[i + 1]);
}
static const unsigned short sync_data[] = {
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
};
static const unsigned short magic0_data[] = {
0x0060, 0x2700, 0x0008, 0x0808, 0x0090, 0x001A, 0x0007, 0x0001,
0x0017, 0x0001, 0x0019, 0x0000, 0x0010, 0x17B0, 0x0011, 0x0116,
0x0012, 0x0198, 0x0013, 0x1400, 0x0029, 0x000C, 0x0012, 0x01B8,
};
static const unsigned short magic1_data[] = {
0x0030, 0x0307, 0x0031, 0x0303, 0x0032, 0x0603, 0x0033, 0x0202,
0x0034, 0x0202, 0x0035, 0x0202, 0x0036, 0x1F1F, 0x0037, 0x0303,
0x0038, 0x0303, 0x0039, 0x0603, 0x003A, 0x0202, 0x003B, 0x0102,
0x003C, 0x0204, 0x003D, 0x0000, 0x0001, 0x0100, 0x0002, 0x0300,
0x0003, 0x5028, 0x0020, 0x00ef, 0x0021, 0x0000, 0x0004, 0x0000,
0x0009, 0x0000, 0x000A, 0x0008, 0x000C, 0x0000, 0x000D, 0x0000,
0x0015, 0x8000,
};
static const unsigned short magic2_data[] = {
0x0061, 0x0001, 0x0092, 0x0100, 0x0093, 0x0001, 0x0007, 0x0021,
};
static const unsigned short magic3_data[] = {
0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061,
};
int migor_lcd_qvga_setup(void *board_data, void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
{
unsigned long xres = 320;
unsigned long yres = 240;
int k;
reset_lcd_module();
migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data));
if (read_reg16(sohandle, so, 0) != 0x1505)
return -ENODEV;
pr_info("Migo-R QVGA LCD Module detected.\n");
migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data));
write_reg16(sohandle, so, 0x00A4, 0x0001);
mdelay(10);
migor_lcd_qvga_seq(sohandle, so, magic0_data, ARRAY_SIZE(magic0_data));
mdelay(100);
migor_lcd_qvga_seq(sohandle, so, magic1_data, ARRAY_SIZE(magic1_data));
write_reg16(sohandle, so, 0x0050, 0xef - (yres - 1));
write_reg16(sohandle, so, 0x0051, 0x00ef);
write_reg16(sohandle, so, 0x0052, 0x0000);
write_reg16(sohandle, so, 0x0053, xres - 1);
migor_lcd_qvga_seq(sohandle, so, magic2_data, ARRAY_SIZE(magic2_data));
mdelay(10);
migor_lcd_qvga_seq(sohandle, so, magic3_data, ARRAY_SIZE(magic3_data));
mdelay(40);
/* clear GRAM to avoid displaying garbage */
write_reg16(sohandle, so, 0x0020, 0x0000); /* horiz addr */
write_reg16(sohandle, so, 0x0021, 0x0000); /* vert addr */
for (k = 0; k < (xres * 256); k++) /* yes, 256 words per line */
write_reg16(sohandle, so, 0x0022, 0x0000);
write_reg16(sohandle, so, 0x0020, 0x0000); /* reset horiz addr */
write_reg16(sohandle, so, 0x0021, 0x0000); /* reset vert addr */
write_reg16(sohandle, so, 0x0007, 0x0173);
mdelay(40);
/* enable display */
write_reg(sohandle, so, 0x00, 0x22);
mdelay(100);
return 0;
}

View file

@ -15,9 +15,15 @@
#include <linux/mtd/nand.h>
#include <linux/i2c.h>
#include <linux/smc91x.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <asm/clock.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
#include <asm/sh_mobile_lcdc.h>
#include <asm/migor.h>
/* Address IRQ Size Bus Description
@ -198,14 +204,237 @@ static struct platform_device migor_nand_flash_device = {
}
};
static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
.clock_source = LCDC_CLK_BUS,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.bpp = 16,
.interface_type = RGB16,
.clock_divider = 2,
.lcd_cfg = {
.name = "LB070WV1",
.xres = 800,
.yres = 480,
.left_margin = 64,
.right_margin = 16,
.hsync_len = 120,
.upper_margin = 1,
.lower_margin = 17,
.vsync_len = 2,
.sync = 0,
},
}
#endif
#ifdef CONFIG_SH_MIGOR_QVGA
.clock_source = LCDC_CLK_PERIPHERAL,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.bpp = 16,
.interface_type = SYS16A,
.clock_divider = 10,
.lcd_cfg = {
.name = "PH240320T",
.xres = 320,
.yres = 240,
.left_margin = 0,
.right_margin = 16,
.hsync_len = 8,
.upper_margin = 1,
.lower_margin = 17,
.vsync_len = 2,
.sync = FB_SYNC_HOR_HIGH_ACT,
},
.board_cfg = {
.setup_sys = migor_lcd_qvga_setup,
},
.sys_bus_cfg = {
.ldmt2r = 0x06000a09,
.ldmt3r = 0x180e3418,
},
}
#endif
};
static struct resource migor_lcdc_resources[] = {
[0] = {
.name = "LCDC",
.start = 0xfe940000, /* P4-only space */
.end = 0xfe941fff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device migor_lcdc_device = {
.name = "sh_mobile_lcdc_fb",
.num_resources = ARRAY_SIZE(migor_lcdc_resources),
.resource = migor_lcdc_resources,
.dev = {
.platform_data = &sh_mobile_lcdc_info,
},
};
static struct clk *camera_clk;
static void camera_power_on(void)
{
unsigned char value;
camera_clk = clk_get(NULL, "video_clk");
clk_set_rate(camera_clk, 24000000);
clk_enable(camera_clk); /* start VIO_CKO */
mdelay(10);
value = ctrl_inb(PORT_PTDR);
value &= ~0x09;
#ifndef CONFIG_SH_MIGOR_RTA_WVGA
value |= 0x01;
#endif
ctrl_outb(value, PORT_PTDR);
mdelay(10);
ctrl_outb(value | 8, PORT_PTDR);
}
static void camera_power_off(void)
{
clk_disable(camera_clk); /* stop VIO_CKO */
clk_put(camera_clk);
ctrl_outb(ctrl_inb(PORT_PTDR) & ~0x08, PORT_PTDR);
}
static unsigned char camera_ov772x_magic[] =
{
0x09, 0x01, 0x0c, 0x10, 0x0d, 0x41, 0x0e, 0x01,
0x12, 0x00, 0x13, 0x8F, 0x14, 0x4A, 0x15, 0x00,
0x16, 0x00, 0x17, 0x23, 0x18, 0xa0, 0x19, 0x07,
0x1a, 0xf0, 0x1b, 0x40, 0x1f, 0x00, 0x20, 0x10,
0x22, 0xff, 0x23, 0x01, 0x28, 0x00, 0x29, 0xa0,
0x2a, 0x00, 0x2b, 0x00, 0x2c, 0xf0, 0x2d, 0x00,
0x2e, 0x00, 0x30, 0x80, 0x31, 0x60, 0x32, 0x00,
0x33, 0x00, 0x34, 0x00, 0x3d, 0x80, 0x3e, 0xe2,
0x3f, 0x1f, 0x42, 0x80, 0x43, 0x80, 0x44, 0x80,
0x45, 0x80, 0x46, 0x00, 0x47, 0x00, 0x48, 0x00,
0x49, 0x50, 0x4a, 0x30, 0x4b, 0x50, 0x4c, 0x50,
0x4d, 0x00, 0x4e, 0xef, 0x4f, 0x10, 0x50, 0x60,
0x51, 0x00, 0x52, 0x00, 0x53, 0x24, 0x54, 0x7a,
0x55, 0xfc, 0x62, 0xff, 0x63, 0xf0, 0x64, 0x1f,
0x65, 0x00, 0x66, 0x10, 0x67, 0x00, 0x68, 0x00,
0x69, 0x5c, 0x6a, 0x11, 0x6b, 0xa2, 0x6c, 0x01,
0x6d, 0x50, 0x6e, 0x80, 0x6f, 0x80, 0x70, 0x0f,
0x71, 0x00, 0x72, 0x00, 0x73, 0x0f, 0x74, 0x0f,
0x75, 0xff, 0x78, 0x10, 0x79, 0x70, 0x7a, 0x70,
0x7b, 0xf0, 0x7c, 0xf0, 0x7d, 0xf0, 0x7e, 0x0e,
0x7f, 0x1a, 0x80, 0x31, 0x81, 0x5a, 0x82, 0x69,
0x83, 0x75, 0x84, 0x7e, 0x85, 0x88, 0x86, 0x8f,
0x87, 0x96, 0x88, 0xa3, 0x89, 0xaf, 0x8a, 0xc4,
0x8b, 0xd7, 0x8c, 0xe8, 0x8d, 0x20, 0x8e, 0x00,
0x8f, 0x00, 0x90, 0x08, 0x91, 0x10, 0x92, 0x1f,
0x93, 0x01, 0x94, 0x2c, 0x95, 0x24, 0x96, 0x08,
0x97, 0x14, 0x98, 0x24, 0x99, 0x38, 0x9a, 0x9e,
0x9b, 0x00, 0x9c, 0x40, 0x9e, 0x11, 0x9f, 0x02,
0xa0, 0x00, 0xa1, 0x40, 0xa2, 0x40, 0xa3, 0x06,
0xa4, 0x00, 0xa6, 0x00, 0xa7, 0x40, 0xa8, 0x40,
0xa9, 0x80, 0xaa, 0x80, 0xab, 0x06, 0xac, 0xff,
0x12, 0x06, 0x64, 0x3f, 0x12, 0x46, 0x17, 0x3f,
0x18, 0x50, 0x19, 0x03, 0x1a, 0x78, 0x29, 0x50,
0x2c, 0x78,
};
static int ov772x_set_capture(struct soc_camera_platform_info *info,
int enable)
{
struct i2c_adapter *a = i2c_get_adapter(0);
struct i2c_msg msg;
int ret = 0;
int i;
if (!enable)
return 0; /* camera_power_off() is enough */
for (i = 0; i < ARRAY_SIZE(camera_ov772x_magic); i += 2) {
u_int8_t buf[8];
msg.addr = 0x21;
msg.buf = buf;
msg.len = 2;
msg.flags = 0;
buf[0] = camera_ov772x_magic[i];
buf[1] = camera_ov772x_magic[i + 1];
ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
}
return ret;
}
static struct soc_camera_platform_info ov772x_info = {
.iface = 0,
.format_name = "RGB565",
.format_depth = 16,
.format = {
.pixelformat = V4L2_PIX_FMT_RGB565,
.colorspace = V4L2_COLORSPACE_SRGB,
.width = 320,
.height = 240,
},
.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
.set_capture = ov772x_set_capture,
};
static struct platform_device migor_camera_device = {
.name = "soc_camera_platform",
.dev = {
.platform_data = &ov772x_info,
},
};
static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
.flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \
| SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH,
.enable_camera = camera_power_on,
.disable_camera = camera_power_off,
};
static struct resource migor_ceu_resources[] = {
[0] = {
.name = "CEU",
.start = 0xfe910000,
.end = 0xfe91009f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 52,
.flags = IORESOURCE_IRQ,
},
[2] = {
/* place holder for contiguous memory */
},
};
static struct platform_device migor_ceu_device = {
.name = "sh_mobile_ceu",
.num_resources = ARRAY_SIZE(migor_ceu_resources),
.resource = migor_ceu_resources,
.dev = {
.platform_data = &sh_mobile_ceu_info,
},
};
static struct platform_device *migor_devices[] __initdata = {
&smc91x_eth_device,
&sh_keysc_device,
&migor_lcdc_device,
&migor_ceu_device,
&migor_camera_device,
&migor_nor_flash_device,
&migor_nand_flash_device,
};
static struct i2c_board_info __initdata migor_i2c_devices[] = {
static struct i2c_board_info migor_i2c_devices[] = {
{
I2C_BOARD_INFO("rs5c372b", 0x32),
},
@ -217,6 +446,12 @@ static struct i2c_board_info __initdata migor_i2c_devices[] = {
static int __init migor_devices_setup(void)
{
clk_always_enable("mstp214"); /* KEYSC */
clk_always_enable("mstp200"); /* LCDC */
clk_always_enable("mstp203"); /* CEU */
platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
i2c_register_board_info(0, migor_i2c_devices,
ARRAY_SIZE(migor_i2c_devices));
@ -235,20 +470,51 @@ static void __init migor_setup(char **cmdline_p)
ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2);
/* NAND Flash */
ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
BSC_CS6ABCR);
/* I2C */
ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1);
/* Touch Panel - Enable IRQ6 */
ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA);
ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
/* LCDC - WVGA - Enable RGB Interface signals */
ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
ctrl_outw(0x0000, PORT_PHCR);
ctrl_outw(0x0000, PORT_PLCR);
ctrl_outw(0x0000, PORT_PMCR);
ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR);
ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD);
ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
#endif
#ifdef CONFIG_SH_MIGOR_QVGA
/* LCDC - QVGA - Enable SYS Interface signals */
ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR);
ctrl_outw(0x0000, PORT_PLCR);
ctrl_outw(0x0000, PORT_PMCR);
ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR);
ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD);
ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
#endif
/* CEU */
ctrl_outw((ctrl_inw(PORT_PTCR) & ~0x03c3) | 0x0051, PORT_PTCR);
ctrl_outw(ctrl_inw(PORT_PUCR) & ~0x03ff, PORT_PUCR);
ctrl_outw(ctrl_inw(PORT_PVCR) & ~0x03ff, PORT_PVCR);
ctrl_outw(ctrl_inw(PORT_PWCR) & ~0x3c00, PORT_PWCR);
ctrl_outw(ctrl_inw(PORT_PSELC) | 0x0001, PORT_PSELC);
ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x2000, PORT_PSELD);
ctrl_outw(ctrl_inw(PORT_PSELE) | 0x000f, PORT_PSELE);
ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2200, PORT_MSELCRB);
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x0a00, PORT_HIZCRA);
ctrl_outw(ctrl_inw(PORT_HIZCRB) & ~0x0003, PORT_HIZCRB);
}
static struct sh_machine_vector mv_migor __initmv = {

View file

@ -0,0 +1 @@
obj-y := setup.o

View file

@ -0,0 +1,126 @@
/*
* Renesas Technology Europe RSK+ 7203 Support.
*
* Copyright (C) 2008 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/map.h>
#include <asm/machvec.h>
#include <asm/io.h>
static struct resource smc911x_resources[] = {
[0] = {
.start = 0x24000000,
.end = 0x24000000 + 0x100,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 64,
.end = 64,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device smc911x_device = {
.name = "smc911x",
.id = -1,
.num_resources = ARRAY_SIZE(smc911x_resources),
.resource = smc911x_resources,
};
static const char *probes[] = { "cmdlinepart", NULL };
static struct mtd_partition *parsed_partitions;
static struct mtd_partition rsk7203_partitions[] = {
{
.name = "Bootloader",
.offset = 0x00000000,
.size = 0x00040000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "Kernel",
.offset = MTDPART_OFS_NXTBLK,
.size = 0x001c0000,
}, {
.name = "Flash_FS",
.offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
}
};
static struct physmap_flash_data flash_data = {
.width = 2,
};
static struct resource flash_resource = {
.start = 0x20000000,
.end = 0x20400000,
.flags = IORESOURCE_MEM,
};
static struct platform_device flash_device = {
.name = "physmap-flash",
.id = -1,
.resource = &flash_resource,
.num_resources = 1,
.dev = {
.platform_data = &flash_data,
},
};
static struct mtd_info *flash_mtd;
static struct map_info rsk7203_flash_map = {
.name = "RSK+ Flash",
.size = 0x400000,
.bankwidth = 2,
};
static void __init set_mtd_partitions(void)
{
int nr_parts = 0;
simple_map_init(&rsk7203_flash_map);
flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map);
nr_parts = parse_mtd_partitions(flash_mtd, probes,
&parsed_partitions, 0);
/* If there is no partition table, used the hard coded table */
if (nr_parts <= 0) {
flash_data.parts = rsk7203_partitions;
flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions);
} else {
flash_data.nr_parts = nr_parts;
flash_data.parts = parsed_partitions;
}
}
static struct platform_device *rsk7203_devices[] __initdata = {
&smc911x_device,
&flash_device,
};
static int __init rsk7203_devices_setup(void)
{
set_mtd_partitions();
return platform_add_devices(rsk7203_devices,
ARRAY_SIZE(rsk7203_devices));
}
device_initcall(rsk7203_devices_setup);
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_rsk7203 __initmv = {
.mv_name = "RSK+7203",
};

View file

@ -0,0 +1 @@
obj-y := setup.o irq.o

View file

@ -0,0 +1,45 @@
/*
* linux/arch/sh/boards/renesas/sh7763rdp/irq.c
*
* Renesas Solutions SH7763RDP Support.
*
* Copyright (C) 2008 Renesas Solutions Corp.
* Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/sh7763rdp.h>
#define INTC_BASE (0xFFD00000)
#define INTC_INT2PRI7 (INTC_BASE+0x4001C)
#define INTC_INT2MSKCR (INTC_BASE+0x4003C)
#define INTC_INT2MSKCR1 (INTC_BASE+0x400D4)
/*
* Initialize IRQ setting
*/
void __init init_sh7763rdp_IRQ(void)
{
/* GPIO enabled */
ctrl_outl(1 << 25, INTC_INT2MSKCR);
/* enable GPIO interrupts */
ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
INTC_INT2PRI7);
/* USBH enabled */
ctrl_outl(1 << 17, INTC_INT2MSKCR1);
/* GETHER enabled */
ctrl_outl(1 << 16, INTC_INT2MSKCR1);
/* DMAC enabled */
ctrl_outl(1 << 8, INTC_INT2MSKCR);
}

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@ -0,0 +1,128 @@
/*
* linux/arch/sh/boards/renesas/sh7763rdp/setup.c
*
* Renesas Solutions sh7763rdp board
*
* Copyright (C) 2008 Renesas Solutions Corp.
* Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/input.h>
#include <linux/mtd/physmap.h>
#include <asm/io.h>
#include <asm/sh7763rdp.h>
/* NOR Flash */
static struct mtd_partition sh7763rdp_nor_flash_partitions[] = {
{
.name = "U-Boot",
.offset = 0,
.size = (2 * 128 * 1024),
.mask_flags = MTD_WRITEABLE, /* Read-only */
}, {
.name = "Linux-Kernel",
.offset = MTDPART_OFS_APPEND,
.size = (20 * 128 * 1024),
}, {
.name = "Root Filesystem",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data sh7763rdp_nor_flash_data = {
.width = 2,
.parts = sh7763rdp_nor_flash_partitions,
.nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions),
};
static struct resource sh7763rdp_nor_flash_resources[] = {
[0] = {
.name = "NOR Flash",
.start = 0,
.end = (64 * 1024 * 1024),
.flags = IORESOURCE_MEM,
},
};
static struct platform_device sh7763rdp_nor_flash_device = {
.name = "physmap-flash",
.resource = sh7763rdp_nor_flash_resources,
.num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources),
.dev = {
.platform_data = &sh7763rdp_nor_flash_data,
},
};
static struct platform_device *sh7763rdp_devices[] __initdata = {
&sh7763rdp_nor_flash_device,
};
static int __init sh7763rdp_devices_setup(void)
{
return platform_add_devices(sh7763rdp_devices,
ARRAY_SIZE(sh7763rdp_devices));
}
__initcall(sh7763rdp_devices_setup);
static void __init sh7763rdp_setup(char **cmdline_p)
{
/* Board version check */
if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
printk(KERN_INFO "RTE Standard Configuration\n");
else
printk(KERN_INFO "RTA Standard Configuration\n");
/* USB pin select bits (clear bit 5-2 to 0) */
ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
/* USBH setup port I controls to other (clear bits 4-9 to 0) */
ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR);
/* Select USB Host controller */
ctrl_outw(0x00, USB_USBHSC);
/* For LCD */
/* set PTJ7-1, bits 15-2 of PJCR to 0 */
ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR);
/* set PTI5, bits 11-10 of PICR to 0 */
ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR);
ctrl_outw(0, PORT_PKCR);
ctrl_outw(0, PORT_PLCR);
/* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
/* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
/* For HAC */
/* bit3-0 0100:HAC & SSI1 enable */
ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
/* bit14 1:SSI_HAC_CLK enable */
ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
/* SH-Ether */
ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
ctrl_outw(0x0, PORT_PFCR);
ctrl_outw(0x0, PORT_PFCR);
ctrl_outw(0x0, PORT_PFCR);
/* MMC */
/*selects SCIF and MMC other functions */
ctrl_outw(0x0001, PORT_PSEL0);
/* MMC clock operates */
ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1);
ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR);
ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
}
static struct sh_machine_vector mv_sh7763rdp __initmv = {
.mv_name = "sh7763drp",
.mv_setup = sh7763rdp_setup,
.mv_nr_irqs = 112,
.mv_init_irq = init_sh7763rdp_IRQ,
};

View file

@ -0,0 +1 @@
obj-y := setup.o

View file

@ -0,0 +1,302 @@
/*
* Renesas Technology Corp. R0P7785LC0011RL Support.
*
* Copyright (C) 2008 Yoshihiro Shimoda
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sm501.h>
#include <linux/sm501-regs.h>
#include <linux/fb.h>
#include <linux/mtd/physmap.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/i2c-pca-platform.h>
#include <linux/i2c-algo-pca.h>
#include <asm/heartbeat.h>
#include <asm/sh7785lcr.h>
/*
* NOTE: This board has 2 physical memory maps.
* Please look at include/asm-sh/sh7785lcr.h or hardware manual.
*/
static struct resource heartbeat_resources[] = {
[0] = {
.start = PLD_LEDCR,
.end = PLD_LEDCR,
.flags = IORESOURCE_MEM,
},
};
static struct heartbeat_data heartbeat_data = {
.regsize = 8,
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = &heartbeat_data,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct mtd_partition nor_flash_partitions[] = {
{
.name = "loader",
.offset = 0x00000000,
.size = 512 * 1024,
},
{
.name = "bootenv",
.offset = MTDPART_OFS_APPEND,
.size = 512 * 1024,
},
{
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = 4 * 1024 * 1024,
},
{
.name = "data",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data nor_flash_data = {
.width = 4,
.parts = nor_flash_partitions,
.nr_parts = ARRAY_SIZE(nor_flash_partitions),
};
static struct resource nor_flash_resources[] = {
[0] = {
.start = NOR_FLASH_ADDR,
.end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device nor_flash_device = {
.name = "physmap-flash",
.dev = {
.platform_data = &nor_flash_data,
},
.num_resources = ARRAY_SIZE(nor_flash_resources),
.resource = nor_flash_resources,
};
static struct resource r8a66597_usb_host_resources[] = {
[0] = {
.name = "r8a66597_hcd",
.start = R8A66597_ADDR,
.end = R8A66597_ADDR + R8A66597_SIZE - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "r8a66597_hcd",
.start = 2,
.end = 2,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device r8a66597_usb_host_device = {
.name = "r8a66597_hcd",
.id = -1,
.dev = {
.dma_mask = NULL,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
.resource = r8a66597_usb_host_resources,
};
static struct resource sm501_resources[] = {
[0] = {
.start = SM107_MEM_ADDR,
.end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SM107_REG_ADDR,
.end = SM107_REG_ADDR + SM107_REG_SIZE - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = 10,
.flags = IORESOURCE_IRQ,
},
};
static struct fb_videomode sm501_default_mode_crt = {
.pixclock = 35714, /* 28MHz */
.xres = 640,
.yres = 480,
.left_margin = 105,
.right_margin = 16,
.upper_margin = 33,
.lower_margin = 10,
.hsync_len = 39,
.vsync_len = 2,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct fb_videomode sm501_default_mode_pnl = {
.pixclock = 40000, /* 25MHz */
.xres = 640,
.yres = 480,
.left_margin = 2,
.right_margin = 16,
.upper_margin = 33,
.lower_margin = 10,
.hsync_len = 39,
.vsync_len = 2,
.sync = 0,
};
static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
.def_bpp = 16,
.def_mode = &sm501_default_mode_pnl,
.flags = SM501FB_FLAG_USE_INIT_MODE |
SM501FB_FLAG_USE_HWCURSOR |
SM501FB_FLAG_USE_HWACCEL |
SM501FB_FLAG_DISABLE_AT_EXIT |
SM501FB_FLAG_PANEL_NO_VBIASEN,
};
static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
.def_bpp = 16,
.def_mode = &sm501_default_mode_crt,
.flags = SM501FB_FLAG_USE_INIT_MODE |
SM501FB_FLAG_USE_HWCURSOR |
SM501FB_FLAG_USE_HWACCEL |
SM501FB_FLAG_DISABLE_AT_EXIT,
};
static struct sm501_platdata_fb sm501_fb_pdata = {
.fb_route = SM501_FB_OWN,
.fb_crt = &sm501_pdata_fbsub_crt,
.fb_pnl = &sm501_pdata_fbsub_pnl,
};
static struct sm501_initdata sm501_initdata = {
.gpio_high = {
.set = 0x00001fe0,
.mask = 0x0,
},
.devices = 0,
.mclk = 84 * 1000000,
.m1xclk = 112 * 1000000,
};
static struct sm501_platdata sm501_platform_data = {
.init = &sm501_initdata,
.fb = &sm501_fb_pdata,
};
static struct platform_device sm501_device = {
.name = "sm501",
.id = -1,
.dev = {
.platform_data = &sm501_platform_data,
},
.num_resources = ARRAY_SIZE(sm501_resources),
.resource = sm501_resources,
};
static struct resource i2c_resources[] = {
[0] = {
.start = PCA9564_ADDR,
.end = PCA9564_ADDR + PCA9564_SIZE - 1,
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
},
[1] = {
.start = 12,
.end = 12,
.flags = IORESOURCE_IRQ,
},
};
static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
.gpio = 0,
.i2c_clock_speed = I2C_PCA_CON_330kHz,
.timeout = 100,
};
static struct platform_device i2c_device = {
.name = "i2c-pca-platform",
.id = -1,
.dev = {
.platform_data = &i2c_platform_data,
},
.num_resources = ARRAY_SIZE(i2c_resources),
.resource = i2c_resources,
};
static struct platform_device *sh7785lcr_devices[] __initdata = {
&heartbeat_device,
&nor_flash_device,
&r8a66597_usb_host_device,
&sm501_device,
&i2c_device,
};
static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
{
I2C_BOARD_INFO("r2025sd", 0x32),
},
};
static int __init sh7785lcr_devices_setup(void)
{
i2c_register_board_info(0, sh7785lcr_i2c_devices,
ARRAY_SIZE(sh7785lcr_i2c_devices));
return platform_add_devices(sh7785lcr_devices,
ARRAY_SIZE(sh7785lcr_devices));
}
__initcall(sh7785lcr_devices_setup);
/* Initialize IRQ setting */
void __init init_sh7785lcr_IRQ(void)
{
plat_irq_setup_pins(IRQ_MODE_IRQ7654);
plat_irq_setup_pins(IRQ_MODE_IRQ3210);
}
static void sh7785lcr_power_off(void)
{
ctrl_outb(0x01, P2SEGADDR(PLD_POFCR));
}
/* Initialize the board */
static void __init sh7785lcr_setup(char **cmdline_p)
{
void __iomem *sm501_reg;
printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
pm_power_off = sh7785lcr_power_off;
/* sm501 DRAM configuration */
sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
writel(0x000307c2, sm501_reg);
}
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_sh7785lcr __initmv = {
.mv_name = "SH7785LCR",
.mv_setup = sh7785lcr_setup,
.mv_init_irq = init_sh7785lcr_IRQ,
};

View file

@ -1,202 +1,80 @@
/*
* arch/sh/boards/se/7343/irq.c
* linux/arch/sh/boards/se/7343/irq.c
*
* Copyright (C) 2008 Yoshihiro Shimoda
*
* Based on linux/arch/sh/boards/se/7722/irq.c
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/mach/se7343.h>
#include <asm/se7343.h>
static void
disable_intreq_irq(unsigned int irq)
static void disable_se7343_irq(unsigned int irq)
{
int bit = irq - OFFCHIP_IRQ_BASE;
u16 val;
val = ctrl_inw(PA_CPLD_IMSK);
val |= 1 << bit;
ctrl_outw(val, PA_CPLD_IMSK);
unsigned int bit = irq - SE7343_FPGA_IRQ_BASE;
ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
}
static void
enable_intreq_irq(unsigned int irq)
static void enable_se7343_irq(unsigned int irq)
{
int bit = irq - OFFCHIP_IRQ_BASE;
u16 val;
val = ctrl_inw(PA_CPLD_IMSK);
val &= ~(1 << bit);
ctrl_outw(val, PA_CPLD_IMSK);
unsigned int bit = irq - SE7343_FPGA_IRQ_BASE;
ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
}
static void
mask_and_ack_intreq_irq(unsigned int irq)
{
disable_intreq_irq(irq);
}
static unsigned int
startup_intreq_irq(unsigned int irq)
{
enable_intreq_irq(irq);
return 0;
}
static void
shutdown_intreq_irq(unsigned int irq)
{
disable_intreq_irq(irq);
}
static void
end_intreq_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_intreq_irq(irq);
}
static struct hw_interrupt_type intreq_irq_type = {
.typename = "FPGA-IRQ",
.startup = startup_intreq_irq,
.shutdown = shutdown_intreq_irq,
.enable = enable_intreq_irq,
.disable = disable_intreq_irq,
.ack = mask_and_ack_intreq_irq,
.end = end_intreq_irq
static struct irq_chip se7343_irq_chip __read_mostly = {
.name = "SE7343-FPGA",
.mask = disable_se7343_irq,
.unmask = enable_se7343_irq,
.mask_ack = disable_se7343_irq,
};
static void
make_intreq_irq(unsigned int irq)
static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
{
disable_irq_nosync(irq);
irq_desc[irq].chip = &intreq_irq_type;
disable_intreq_irq(irq);
}
unsigned short intv = ctrl_inw(PA_CPLD_ST);
struct irq_desc *ext_desc;
unsigned int ext_irq = SE7343_FPGA_IRQ_BASE;
int
shmse_irq_demux(int irq)
{
int bit;
volatile u16 val;
intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
if (irq == IRQ5_IRQ) {
/* Read status Register */
val = ctrl_inw(PA_CPLD_ST);
bit = ffs(val);
if (bit != 0)
return OFFCHIP_IRQ_BASE + bit - 1;
while (intv) {
if (intv & 1) {
ext_desc = irq_desc + ext_irq;
handle_level_irq(ext_irq, ext_desc);
}
intv >>= 1;
ext_irq++;
}
return irq;
}
/* IRQ5 is multiplexed between the following sources:
* 1. PC Card socket
* 2. Extension slot
* 3. USB Controller
* 4. Serial Controller
*
* We configure IRQ5 as a cascade IRQ.
*/
static struct irqaction irq5 = {
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "IRQ5-cascade",
};
static struct ipr_data se7343_irq5_ipr_map[] = {
{ IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY },
};
static struct ipr_data se7343_siof0_vpu_ipr_map[] = {
{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
{ VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8 },
};
static struct ipr_data se7343_other_ipr_map[] = {
{ DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
{ DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
/* I2C block */
{ IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
{ IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
{ IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
{ IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
{ IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
{ IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
{ IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
{ IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
/* SIOF */
{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
/* SIU */
{ SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY },
/* VIO interrupt */
{ CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
{ BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
{ VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
/*MFI interrupt*/
{ MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY },
/* LCD controller */
{ LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY },
};
/*
* Initialize IRQ setting
*/
void __init
init_7343se_IRQ(void)
void __init init_7343se_IRQ(void)
{
/* Setup Multiplexed interrupts */
ctrl_outw(8, PA_CPLD_MODESET); /* Set all CPLD interrupts to active
* low.
*/
/* Mask all CPLD controller interrupts */
ctrl_outw(0x0fff, PA_CPLD_IMSK);
int i;
/* PC Card interrupts */
make_intreq_irq(PC_IRQ0);
make_intreq_irq(PC_IRQ1);
make_intreq_irq(PC_IRQ2);
make_intreq_irq(PC_IRQ3);
ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */
ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
/* Extension Slot Interrupts */
make_intreq_irq(EXT_IRQ0);
make_intreq_irq(EXT_IRQ1);
make_intreq_irq(EXT_IRQ2);
make_intreq_irq(EXT_IRQ3);
for (i = 0; i < SE7343_FPGA_IRQ_NR; i++)
set_irq_chip_and_handler_name(SE7343_FPGA_IRQ_BASE + i,
&se7343_irq_chip,
handle_level_irq, "level");
/* USB Controller interrupts */
make_intreq_irq(USB_IRQ0);
make_intreq_irq(USB_IRQ1);
/* Serial Controller interrupts */
make_intreq_irq(UART_IRQ0);
make_intreq_irq(UART_IRQ1);
/* Setup all external interrupts to be active low */
ctrl_outw(0xaaaa, INTC_ICR1);
make_ipr_irq(se7343_irq5_ipr_map, ARRAY_SIZE(se7343_irq5_ipr_map));
setup_irq(IRQ5_IRQ, &irq5);
/* Set port control to use IRQ5 */
*(u16 *)0xA4050108 &= ~0xc;
make_ipr_irq(se7343_siof0_vpu_ipr_map, ARRAY_SIZE(se7343_siof0_vpu_ipr_map));
ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */
make_ipr_irq(se7343_other_ipr_map, ARRAY_SIZE(se7343_other_ipr_map));
ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux);
set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux);
set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ4_IRQ, se7343_irq_demux);
set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ5_IRQ, se7343_irq_demux);
set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
}

View file

@ -1,10 +1,11 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <asm/machvec.h>
#include <asm/mach/se7343.h>
#include <asm/heartbeat.h>
#include <asm/irq.h>
void init_7343se_IRQ(void);
#include <asm/io.h>
static struct resource smc91x_resources[] = {
[0] = {
@ -17,8 +18,8 @@ static struct resource smc91x_resources[] = {
* shared with other devices via externel
* interrupt controller in FPGA...
*/
.start = EXT_IRQ2,
.end = EXT_IRQ2,
.start = SMC_IRQ,
.end = SMC_IRQ,
.flags = IORESOURCE_IRQ,
},
};
@ -38,16 +39,65 @@ static struct resource heartbeat_resources[] = {
},
};
static struct heartbeat_data heartbeat_data = {
.regsize = 16,
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = &heartbeat_data,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct mtd_partition nor_flash_partitions[] = {
{
.name = "loader",
.offset = 0x00000000,
.size = 128 * 1024,
},
{
.name = "rootfs",
.offset = MTDPART_OFS_APPEND,
.size = 31 * 1024 * 1024,
},
{
.name = "data",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data nor_flash_data = {
.width = 2,
.parts = nor_flash_partitions,
.nr_parts = ARRAY_SIZE(nor_flash_partitions),
};
static struct resource nor_flash_resources[] = {
[0] = {
.start = 0x00000000,
.end = 0x01ffffff,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device nor_flash_device = {
.name = "physmap-flash",
.dev = {
.platform_data = &nor_flash_data,
},
.num_resources = ARRAY_SIZE(nor_flash_resources),
.resource = nor_flash_resources,
};
static struct platform_device *sh7343se_platform_devices[] __initdata = {
&smc91x_device,
&heartbeat_device,
&nor_flash_device,
};
static int __init sh7343se_devices_setup(void)
@ -55,10 +105,19 @@ static int __init sh7343se_devices_setup(void)
return platform_add_devices(sh7343se_platform_devices,
ARRAY_SIZE(sh7343se_platform_devices));
}
device_initcall(sh7343se_devices_setup);
/*
* Initialize the board
*/
static void __init sh7343se_setup(char **cmdline_p)
{
device_initcall(sh7343se_devices_setup);
ctrl_outw(0xf900, FPGA_OUT); /* FPGA */
ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
ctrl_outw(0x0020, PORT_PSELD);
printk(KERN_INFO "MS7343CP01 Setup...done\n");
}
/*
@ -90,5 +149,4 @@ static struct sh_machine_vector mv_7343se __initmv = {
.mv_outsl = sh7343se_outsl,
.mv_init_irq = init_7343se_IRQ,
.mv_irq_demux = shmse_irq_demux,
};

View file

@ -1,25 +1,13 @@
/* $Id: io.c,v 1.7 2006/02/05 21:55:29 lethal Exp $
*
* linux/arch/sh/kernel/io_se.c
*
/*
* Copyright (C) 2000 Kazumoto Kojima
*
* I/O routine for Hitachi SolutionEngine.
*
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/io.h>
#include <asm/se.h>
/* SH pcmcia io window base, start and end. */
int sh_pcic_io_wbase = 0xb8400000;
int sh_pcic_io_start;
int sh_pcic_io_stop;
int sh_pcic_io_type;
int sh_pcic_io_dummy;
/* MS7750 requires special versions of in*, out* routines, since
PC-like io ports are located at upper half byte of 16-bit word which
can be accessed only with 16-bit wide. */
@ -33,8 +21,6 @@ port2adr(unsigned int port)
return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
else if (port >= 0x1000)
return (volatile __u16 *) (PA_83902 + (port << 1));
else if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
return (volatile __u16 *) (sh_pcic_io_wbase + (port &~ 1));
else
return (volatile __u16 *) (PA_SUPERIO + (port << 1));
}
@ -51,32 +37,27 @@ shifted_port(unsigned long port)
unsigned char se_inb(unsigned long port)
{
if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
return *(__u8 *) (sh_pcic_io_wbase + 0x40000 + port);
else if (shifted_port(port))
return (*port2adr(port) >> 8);
if (shifted_port(port))
return (*port2adr(port) >> 8);
else
return (*port2adr(port))&0xff;
return (*port2adr(port))&0xff;
}
unsigned char se_inb_p(unsigned long port)
{
unsigned long v;
if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
v = *(__u8 *) (sh_pcic_io_wbase + 0x40000 + port);
else if (shifted_port(port))
v = (*port2adr(port) >> 8);
if (shifted_port(port))
v = (*port2adr(port) >> 8);
else
v = (*port2adr(port))&0xff;
v = (*port2adr(port))&0xff;
ctrl_delay();
return v;
}
unsigned short se_inw(unsigned long port)
{
if (port >= 0x2000 ||
(sh_pcic_io_start <= port && port <= sh_pcic_io_stop))
if (port >= 0x2000)
return *port2adr(port);
else
maybebadio(port);
@ -91,9 +72,7 @@ unsigned int se_inl(unsigned long port)
void se_outb(unsigned char value, unsigned long port)
{
if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
*(__u8 *)(sh_pcic_io_wbase + port) = value;
else if (shifted_port(port))
if (shifted_port(port))
*(port2adr(port)) = value << 8;
else
*(port2adr(port)) = value;
@ -101,9 +80,7 @@ void se_outb(unsigned char value, unsigned long port)
void se_outb_p(unsigned char value, unsigned long port)
{
if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
*(__u8 *)(sh_pcic_io_wbase + port) = value;
else if (shifted_port(port))
if (shifted_port(port))
*(port2adr(port)) = value << 8;
else
*(port2adr(port)) = value;
@ -112,8 +89,7 @@ void se_outb_p(unsigned char value, unsigned long port)
void se_outw(unsigned short value, unsigned long port)
{
if (port >= 0x2000 ||
(sh_pcic_io_start <= port && port <= sh_pcic_io_stop))
if (port >= 0x2000)
*port2adr(port) = value;
else
maybebadio(port);
@ -129,11 +105,7 @@ void se_insb(unsigned long port, void *addr, unsigned long count)
volatile __u16 *p = port2adr(port);
__u8 *ap = addr;
if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) {
volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + 0x40000 + port);
while (count--)
*ap++ = *bp;
} else if (shifted_port(port)) {
if (shifted_port(port)) {
while (count--)
*ap++ = *p >> 8;
} else {
@ -160,11 +132,7 @@ void se_outsb(unsigned long port, const void *addr, unsigned long count)
volatile __u16 *p = port2adr(port);
const __u8 *ap = addr;
if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) {
volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + port);
while (count--)
*bp = *ap++;
} else if (shifted_port(port)) {
if (shifted_port(port)) {
while (count--)
*p = *ap++ << 8;
} else {
@ -177,6 +145,7 @@ void se_outsw(unsigned long port, const void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
const __u16 *ap = addr;
while (count--)
*p = *ap++;
}

View file

@ -14,8 +14,6 @@
#include <asm/smc37c93x.h>
#include <asm/heartbeat.h>
void init_se_IRQ(void);
/*
* Configure the Super I/O chip
*/
@ -73,7 +71,7 @@ static struct resource cf_ide_resources[] = {
},
[1] = {
.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
.end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
.end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
.flags = IORESOURCE_MEM,
},
[2] = {
@ -115,9 +113,58 @@ static struct platform_device heartbeat_device = {
.resource = heartbeat_resources,
};
/* SH771X Ethernet driver */
static struct resource sh_eth0_resources[] = {
[0] = {
.start = SH_ETH0_BASE,
.end = SH_ETH0_BASE + 0x1B8,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SH_ETH0_IRQ,
.end = SH_ETH0_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sh_eth0_device = {
.name = "sh-eth",
.id = 0,
.dev = {
.platform_data = PHY_ID,
},
.num_resources = ARRAY_SIZE(sh_eth0_resources),
.resource = sh_eth0_resources,
};
static struct resource sh_eth1_resources[] = {
[0] = {
.start = SH_ETH1_BASE,
.end = SH_ETH1_BASE + 0x1B8,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SH_ETH1_IRQ,
.end = SH_ETH1_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sh_eth1_device = {
.name = "sh-eth",
.id = 1,
.dev = {
.platform_data = PHY_ID,
},
.num_resources = ARRAY_SIZE(sh_eth1_resources),
.resource = sh_eth1_resources,
};
static struct platform_device *se_devices[] __initdata = {
&heartbeat_device,
&cf_ide_device,
&sh_eth0_device,
&sh_eth1_device,
};
static int __init se_devices_setup(void)

View file

@ -16,6 +16,7 @@
#include <linux/input.h>
#include <linux/smc91x.h>
#include <asm/machvec.h>
#include <asm/clock.h>
#include <asm/se7722.h>
#include <asm/io.h>
#include <asm/heartbeat.h>
@ -145,6 +146,8 @@ static struct platform_device *se7722_devices[] __initdata = {
static int __init se7722_devices_setup(void)
{
clk_always_enable("mstp214"); /* KEYSC */
return platform_add_devices(se7722_devices,
ARRAY_SIZE(se7722_devices));
}
@ -154,11 +157,6 @@ static void __init se7722_setup(char **cmdline_p)
{
ctrl_outw(0x010D, FPGA_OUT); /* FPGA */
ctrl_outl(0x00051001, MSTPCR0);
ctrl_outl(0x00000000, MSTPCR1);
/* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC, USB */
ctrl_outl(0xffffb7c0, MSTPCR2);
ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */

View file

@ -40,7 +40,7 @@ KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_MEMORY_START) + \
$(CONFIG_ZERO_PAGE_OFFSET)+0x1000]')
$(CONFIG_ZERO_PAGE_OFFSET) + $(CONFIG_ENTRY_OFFSET)]')
quiet_cmd_uimage = UIMAGE $@
cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \

View file

@ -35,8 +35,7 @@ $(obj)/vmlinux.bin: vmlinux FORCE
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip)
LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T
OBJCOPYFLAGS += -R .empty_zero_page
$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,ld)
$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,as_o_S)

View file

@ -37,8 +37,7 @@ $(obj)/vmlinux.bin: vmlinux FORCE
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip)
LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh64-linux -T
OBJCOPYFLAGS += -R .empty_zero_page
$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,ld)
$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,as_o_S)

View file

@ -0,0 +1,8 @@
.global input_len, input_data
.data
input_len:
.long input_data_end - input_data
input_data:
.incbin "arch/sh/boot/compressed/vmlinux.bin.gz"
input_data_end:
.end

View file

@ -1,9 +0,0 @@
SECTIONS
{
.data : {
input_len = .;
LONG(input_data_end - input_data) input_data = .;
*(.data)
input_data_end = .;
}
}

View file

@ -0,0 +1,947 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.26-rc4
# Wed Jun 4 17:30:00 2008
#
CONFIG_SUPERH=y
CONFIG_SUPERH32=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_NO_VIRT_TO_BUS=y
CONFIG_ARCH_SUPPORTS_AOUT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_GROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_RT_GROUP_SCHED is not set
CONFIG_USER_SCHED=y
# CONFIG_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_SYSCTL_SYSCALL_CHECK=y
# CONFIG_KALLSYMS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
# CONFIG_HAVE_DMA_ATTRS is not set
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_CLASSIC_RCU=y
#
# System type
#
CONFIG_CPU_SH4=y
CONFIG_CPU_SH4A=y
CONFIG_CPU_SHX2=y
# CONFIG_CPU_SUBTYPE_SH7619 is not set
# CONFIG_CPU_SUBTYPE_SH7203 is not set
# CONFIG_CPU_SUBTYPE_SH7206 is not set
# CONFIG_CPU_SUBTYPE_SH7263 is not set
# CONFIG_CPU_SUBTYPE_MXG is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
# CONFIG_CPU_SUBTYPE_SH7720 is not set
# CONFIG_CPU_SUBTYPE_SH7721 is not set
# CONFIG_CPU_SUBTYPE_SH7750 is not set
# CONFIG_CPU_SUBTYPE_SH7091 is not set
# CONFIG_CPU_SUBTYPE_SH7750R is not set
# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
# CONFIG_CPU_SUBTYPE_SH7751R is not set
# CONFIG_CPU_SUBTYPE_SH7760 is not set
# CONFIG_CPU_SUBTYPE_SH4_202 is not set
CONFIG_CPU_SUBTYPE_SH7723=y
# CONFIG_CPU_SUBTYPE_SH7763 is not set
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
# CONFIG_CPU_SUBTYPE_SHX3 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
# CONFIG_CPU_SUBTYPE_SH7366 is not set
# CONFIG_CPU_SUBTYPE_SH5_101 is not set
# CONFIG_CPU_SUBTYPE_SH5_103 is not set
#
# Memory management options
#
CONFIG_QUICKLIST=y
CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_MEMORY_START=0x08000000
CONFIG_MEMORY_SIZE=0x08000000
CONFIG_29BIT=y
# CONFIG_X2TLB is not set
CONFIG_VSYSCALL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_MAX_ACTIVE_REGIONS=1
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_SPARSEMEM_STATIC=y
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_NR_QUICK=2
#
# Cache configuration
#
# CONFIG_SH_DIRECT_MAPPED is not set
CONFIG_CACHE_WRITEBACK=y
# CONFIG_CACHE_WRITETHROUGH is not set
# CONFIG_CACHE_OFF is not set
#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_SH_FPU=y
# CONFIG_SH_STORE_QUEUES is not set
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_PTEA=y
CONFIG_CPU_HAS_FPU=y
#
# Board support
#
CONFIG_SH_AP325RXA=y
#
# Timer and clock configuration
#
CONFIG_SH_TMU=y
CONFIG_SH_TIMER_IRQ=16
CONFIG_SH_PCLK_FREQ=33333333
CONFIG_TICK_ONESHOT=y
# CONFIG_NO_HZ is not set
CONFIG_HIGH_RES_TIMERS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# DMA support
#
# CONFIG_SH_DMA is not set
#
# Companion Chips
#
#
# Additional SuperH Device Drivers
#
# CONFIG_HEARTBEAT is not set
# CONFIG_PUSH_SWITCH is not set
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_SCHED_HRTICK is not set
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
# CONFIG_PREEMPT_RCU is not set
CONFIG_GUSA=y
#
# Boot options
#
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=tty1 console=ttySC5,38400 root=/dev/nfs ip=dhcp"
#
# Bus options
#
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_ASK_IP_FIB_HASH=y
# CONFIG_IP_FIB_TRIE is not set
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_MULTIPLE_TABLES is not set
# CONFIG_IP_ROUTE_MULTIPATH is not set
# CONFIG_IP_ROUTE_VERBOSE is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_CFG80211 is not set
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_MTD_OOPS is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0xffffffff
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_BANKWIDTH=0
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
# UBI - Unsorted block images
#
# CONFIG_MTD_UBI is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
CONFIG_SCSI_WAIT_SCAN=m
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
# CONFIG_PHYLIB is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_AX88796 is not set
# CONFIG_STNIC is not set
# CONFIG_SMC91X is not set
CONFIG_SMC911X=y
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=6
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
# CONFIG_SPI is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_WATCHDOG is not set
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
# CONFIG_DAB is not set
#
# Graphics support
#
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_RTC_CLASS is not set
# CONFIG_UIO is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_EXT4DEV_FS is not set
CONFIG_JBD=y
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
# CONFIG_NFSD_V4 is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_BIND34 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
CONFIG_NLS_CODEPAGE_932=y
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_SAMPLES is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_EARLY_SCIF_CONSOLE is not set
# CONFIG_SH_KGDB is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_MANAGER=y
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set
#
# Block modes
#
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
#
# Hash modes
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
#
# Digest
#
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_HW=y
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

View file

@ -23,3 +23,4 @@ obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o
obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o
obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o
obj-$(CONFIG_SH_SH7785LCR) += ops-sh7785lcr.o fixups-sh7785lcr.o

View file

@ -0,0 +1,46 @@
/*
* arch/sh/drivers/pci/fixups-sh7785lcr.c
*
* R0P7785LC0011RL PCI fixups
* Copyright (C) 2008 Yoshihiro Shimoda
*
* Based on arch/sh/drivers/pci/fixups-r7780rp.c
* Copyright (C) 2003 Lineo uSolutions, Inc.
* Copyright (C) 2004 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/pci.h>
#include "pci-sh4.h"
int pci_fixup_pcic(void)
{
pci_write_reg(0x000043ff, SH4_PCIINTM);
pci_write_reg(0x0000380f, SH4_PCIAINTM);
pci_write_reg(0xfbb00047, SH7780_PCICMD);
pci_write_reg(0x00000000, SH7780_PCIIBAR);
pci_write_reg(0x00011912, SH7780_PCISVID);
pci_write_reg(0x08000000, SH7780_PCICSCR0);
pci_write_reg(0x0000001b, SH7780_PCICSAR0);
pci_write_reg(0xfd000000, SH7780_PCICSCR1);
pci_write_reg(0x0000000f, SH7780_PCICSAR1);
pci_write_reg(0xfd000000, SH7780_PCIMBR0);
pci_write_reg(0x00fc0000, SH7780_PCIMBMR0);
#ifdef CONFIG_32BIT
pci_write_reg(0xc0000000, SH7780_PCIMBR2);
pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
#endif
/* Set IOBR for windows containing area specified in pci.h */
pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)),
SH7780_PCIIOBR);
pci_write_reg(((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR);
return 0;
}

View file

@ -22,6 +22,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/irq.h>
@ -48,6 +49,7 @@ struct pci_channel board_pci_channels[] = {
&gapspci_mem_resource, 0, 1 },
{ 0, }
};
EXPORT_SYMBOL(board_pci_channels);
/*
* The !gapspci_config_access case really shouldn't happen, ever, unless

View file

@ -0,0 +1,66 @@
/*
* Author: Ian DaSilva (idasilva@mvista.com)
*
* Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* PCI initialization for the Renesas R0P7785LC0011RL board
* Based on arch/sh/drivers/pci/ops-r7780rp.c
*
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include "pci-sh4.h"
static char irq_tab[] __initdata = {
65, 66, 67, 68,
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
return irq_tab[slot];
}
static struct resource sh7785_io_resource = {
.name = "SH7785_IO",
.start = SH7780_PCI_IO_BASE,
.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sh7785_mem_resource = {
.name = "SH7785_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
struct pci_channel board_pci_channels[] = {
{ &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
EXPORT_SYMBOL(board_pci_channels);
static struct sh4_pci_address_map sh7785_pci_map = {
.window0 = {
.base = SH7780_CS2_BASE_ADDR,
.size = 0x04000000,
},
.window1 = {
.base = SH7780_CS3_BASE_ADDR,
.size = 0x04000000,
},
.flags = SH4_PCIC_NO_RESET,
};
int __init pcibios_init_platform(void)
{
return sh7780_pcic_init(&sh7785_pci_map);
}

View file

@ -78,7 +78,7 @@ static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
}
#define EARLY_PCI_OP(rw, size, type) \
int early_##rw##_config_##size(struct pci_channel *hose, \
static int early_##rw##_config_##size(struct pci_channel *hose, \
int top_bus, int bus, int devfn, int offset, type value) \
{ \
return pci_##rw##_config_##size( \

View file

@ -135,7 +135,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
* If we set up a device for bus mastering, we need to check and set
* the latency timer as it may not be properly set.
*/
unsigned int pcibios_max_latency = 255;
static unsigned int pcibios_max_latency = 255;
void pcibios_set_master(struct pci_dev *dev)
{

View file

@ -21,7 +21,7 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_BINFMT_ELF) += dump_task.o
obj-$(CONFIG_ELF_CORE) += dump_task.o
obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
EXTRA_CFLAGS += -Werror

View file

@ -157,7 +157,7 @@ static int __init cf_init_se(void)
}
#endif
int __init cf_init(void)
static int __init cf_init(void)
{
if (mach_is_se() || mach_is_7722se() || mach_is_7721se())
return cf_init_se();

View file

@ -88,7 +88,7 @@ static void propagate_rate(struct clk *clk)
}
}
int __clk_enable(struct clk *clk)
static int __clk_enable(struct clk *clk)
{
/*
* See if this is the first time we're enabling the clock, some
@ -111,7 +111,6 @@ int __clk_enable(struct clk *clk)
return 0;
}
EXPORT_SYMBOL_GPL(__clk_enable);
int clk_enable(struct clk *clk)
{
@ -131,7 +130,7 @@ static void clk_kref_release(struct kref *kref)
/* Nothing to do */
}
void __clk_disable(struct clk *clk)
static void __clk_disable(struct clk *clk)
{
int count = kref_put(&clk->kref, clk_kref_release);
@ -143,7 +142,6 @@ void __clk_disable(struct clk *clk)
clk->ops->disable(clk);
}
}
EXPORT_SYMBOL_GPL(__clk_disable);
void clk_disable(struct clk *clk)
{
@ -310,15 +308,11 @@ static int show_clocks(char *buf, char **start, off_t off,
list_for_each_entry_reverse(clk, &clock_list, node) {
unsigned long rate = clk_get_rate(clk);
/*
* Don't bother listing dummy clocks with no ancestry
* that only support enable and disable ops.
*/
if (unlikely(!rate && !clk->parent))
continue;
p += sprintf(p, "%-12s\t: %ld.%02ldMHz\n", clk->name,
rate / 1000000, (rate % 1000000) / 10000);
p += sprintf(p, "%-12s\t: %ld.%02ldMHz\t%s\n", clk->name,
rate / 1000000, (rate % 1000000) / 10000,
((clk->flags & CLK_ALWAYS_ENABLED) ||
(atomic_read(&clk->kref.refcount) != 1)) ?
"enabled" : "disabled");
}
return p - buf;

View file

@ -62,7 +62,7 @@ struct intc_desc_int {
#endif
static unsigned int intc_prio_level[NR_IRQS]; /* for now */
#ifdef CONFIG_CPU_SH3
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
static unsigned long ack_handle[NR_IRQS];
#endif
@ -231,7 +231,7 @@ static void intc_disable(unsigned int irq)
}
}
#ifdef CONFIG_CPU_SH3
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
static void intc_mask_ack(unsigned int irq)
{
struct intc_desc_int *d = get_intc_desc(irq);
@ -244,8 +244,23 @@ static void intc_mask_ack(unsigned int irq)
if (handle) {
addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
ctrl_inb(addr);
ctrl_outb(0x3f ^ set_field(0, 1, handle), addr);
switch (_INTC_FN(handle)) {
case REG_FN_MODIFY_BASE + 0: /* 8bit */
ctrl_inb(addr);
ctrl_outb(0xff ^ set_field(0, 1, handle), addr);
break;
case REG_FN_MODIFY_BASE + 1: /* 16bit */
ctrl_inw(addr);
ctrl_outw(0xffff ^ set_field(0, 1, handle), addr);
break;
case REG_FN_MODIFY_BASE + 3: /* 32bit */
ctrl_inl(addr);
ctrl_outl(0xffffffff ^ set_field(0, 1, handle), addr);
break;
default:
BUG();
break;
}
}
}
#endif
@ -466,7 +481,7 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
return 0;
}
#ifdef CONFIG_CPU_SH3
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
static unsigned int __init intc_ack_data(struct intc_desc *desc,
struct intc_desc_int *d,
intc_enum enum_id)
@ -601,7 +616,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
/* irq should be disabled by default */
d->chip.mask(irq);
#ifdef CONFIG_CPU_SH3
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
if (desc->ack_regs)
ack_handle[irq] = intc_ack_data(desc, d, enum_id);
#endif
@ -635,7 +650,7 @@ void __init register_intc_controller(struct intc_desc *desc)
d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
#ifdef CONFIG_CPU_SH3
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
#endif
d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg));
@ -676,7 +691,7 @@ void __init register_intc_controller(struct intc_desc *desc)
d->chip.mask_ack = intc_disable;
d->chip.set_type = intc_set_sense;
#ifdef CONFIG_CPU_SH3
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
if (desc->ack_regs) {
for (i = 0; i < desc->nr_ack_regs; i++)
k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);

View file

@ -3,7 +3,7 @@
*
* The SH-2 exception entry
*
* Copyright (C) 2005,2006 Yoshinori Sato
* Copyright (C) 2005-2008 Yoshinori Sato
* Copyright (C) 2005 AXE,Inc.
*
* This file is subject to the terms and conditions of the GNU General Public
@ -36,43 +36,41 @@ OFF_TRA = (16*4+6*4)
#include <asm/entry-macros.S>
ENTRY(exception_handler)
! already saved r0/r1
! stack
! r0 <- point sp
! r1
! pc
! sr
! r0 = temporary
! r1 = vector (pseudo EXPEVT / INTEVT / TRA)
mov.l r2,@-sp
mov.l r3,@-sp
mov r0,r1
cli
mov.l $cpu_mode,r2
mov.l @r2,r0
mov.l @(5*4,r15),r3 ! previous SR
shll2 r3 ! set "S" flag
rotl r0 ! T <- "S" flag
rotl r0 ! "S" flag is LSB
rotcr r3 ! T -> r3:b30
shlr r3
shlr r0
bt/s 1f
mov.l r3,@(5*4,r15) ! copy cpu mode to SR
or r0,r3 ! set MD
tst r0,r0
bf/s 1f ! previous mode check
mov.l r3,@(5*4,r15) ! update SR
! switch to kernel mode
mov #1,r0
rotr r0
rotr r0
mov.l __md_bit,r0
mov.l r0,@r2 ! enter kernel mode
mov.l $current_thread_info,r2
mov.l @r2,r2
mov #0x20,r0
mov #(THREAD_SIZE >> 8),r0
shll8 r0
add r2,r0
mov r15,r2 ! r2 = user stack top
mov r0,r15 ! switch kernel stack
add #-4,r15 ! dummy
mov.l r1,@-r15 ! TRA
sts.l macl, @-r15
sts.l mach, @-r15
stc.l gbr, @-r15
mov.l @(4*4,r2),r0
mov.l @(5*4,r2),r1
mov.l r1,@-r15 ! original SR
mov.l @(5*4,r2),r0
mov.l r0,@-r15 ! original SR
sts.l pr,@-r15
mov.l @(4*4,r2),r0
mov.l r0,@-r15 ! original PC
mov r2,r3
add #(4+2)*4,r3 ! rewind r0 - r3 + exception frame
@ -88,14 +86,15 @@ ENTRY(exception_handler)
mov.l r6,@-r15
mov.l r5,@-r15
mov.l r4,@-r15
mov r1,r9 ! save TRA
mov r2,r8 ! copy user -> kernel stack
mov.l @r8+,r3
mov.l @(0,r8),r3
mov.l r3,@-r15
mov.l @r8+,r2
mov.l @(4,r8),r2
mov.l r2,@-r15
mov.l @r8+,r1
mov.l @(12,r8),r1
mov.l r1,@-r15
mov.l @r8+,r0
mov.l @(8,r8),r0
bra 2f
mov.l r0,@-r15
1:
@ -107,10 +106,11 @@ ENTRY(exception_handler)
mov.l r0,@-r15
mov.l @r2+,r0 ! old R2
mov.l r0,@-r15
mov.l @r2+,r0 ! old R1
mov.l r0,@-r15
mov.l @r2+,r0 ! old R0
mov.l @(4,r2),r0 ! old R1
mov.l r0,@-r15
mov.l @r2,r0 ! old R0
mov.l r0,@-r15
add #8,r2
mov.l @r2+,r3 ! old PC
mov.l @r2+,r0 ! old SR
add #-4,r2 ! exception frame stub (sr)
@ -135,14 +135,12 @@ ENTRY(exception_handler)
mov.l r6,@-r2
mov.l r5,@-r2
mov.l r4,@-r2
mov r1,r9
mov.l @(OFF_R0,r15),r0
mov.l @(OFF_R1,r15),r1
mov.l @(OFF_R2,r15),r2
mov.l @(OFF_R3,r15),r3
2:
mov #OFF_TRA,r8
add r15,r8
mov.l @r8,r9
mov #64,r8
cmp/hs r8,r9
bt interrupt_entry ! vec >= 64 is interrupt
@ -150,26 +148,14 @@ ENTRY(exception_handler)
cmp/hs r8,r9
bt trap_entry ! 64 > vec >= 32 is trap
#if defined(CONFIG_SH_FPU)
mov #13,r8
cmp/eq r8,r9
bt 10f ! fpu
nop
#endif
mov.l 4f,r8
mov r9,r4
shll2 r9
add r9,r8
mov.l @r8,r8
mov #0,r9
cmp/eq r9,r8
mov.l @r8,r8 ! exception handler address
tst r8,r8
bf 3f
mov.l 8f,r8 ! unhandled exception
#if defined(CONFIG_SH_FPU)
10:
mov.l 9f, r8 ! unhandled exception
#endif
3:
mov.l 5f,r10
jmp @r8
@ -188,10 +174,7 @@ interrupt_entry:
5: .long ret_from_exception
6: .long ret_from_irq
7: .long do_IRQ
8: .long do_exception_error
#ifdef CONFIG_SH_FPU
9: .long fpu_error_trap_handler
#endif
8: .long exception_error
trap_entry:
mov #0x30,r8
@ -200,24 +183,9 @@ trap_entry:
add #-0x10,r9 ! convert SH2 to SH3/4 ABI
1:
shll2 r9 ! TRA
mov #OFF_TRA,r8
add r15,r8
mov.l r9,@r8
mov r9,r8
#ifdef CONFIG_TRACE_IRQFLAGS
mov.l 2f, r9
jsr @r9
nop
#endif
sti
bra system_call
nop
bra system_call ! jump common systemcall entry
mov r9,r8
.align 2
#ifdef CONFIG_TRACE_IRQFLAGS
2: .long trace_hardirqs_on
#endif
#if defined(CONFIG_SH_STANDARD_BIOS)
/* Unwind the stack and jmp to the debug entry */
ENTRY(sh_bios_handler)
@ -240,7 +208,7 @@ ENTRY(sh_bios_handler)
mov.l @r2,r2
stc sr,r3
mov.l r2,@r0
mov.l r3,@r0
mov.l r3,@(4,r0)
mov.l r1,@(8,r0)
mov.l @r15+, r0
mov.l @r15+, r1
@ -272,22 +240,30 @@ ENTRY(address_error_trap_handler)
mov.l 1f,r0
jmp @r0
mov #0,r5 ! writeaccess is unknown
.align 2
.align 2
1: .long do_address_error
restore_all:
cli
#ifdef CONFIG_TRACE_IRQFLAGS
mov.l 1f, r0
jsr @r0
nop
#endif
stc sr,r0
or #0xf0,r0
ldc r0,sr ! all interrupt block (same BL = 1)
! restore special register
! overlap exception frame
mov r15,r0
add #17*4,r0
lds.l @r0+,pr
add #4,r0
ldc.l @r0+,gbr
lds.l @r0+,mach
lds.l @r0+,macl
mov r15,r0
mov.l $cpu_mode,r2
mov #OFF_SR,r3
mov.l @(r0,r3),r1
mov.l r1,@r2
mov.l __md_bit,r3
and r1,r3 ! copy MD bit
mov.l r3,@r2
shll2 r1 ! clear MD bit
shlr2 r1
mov.l @(OFF_SP,r0),r2
@ -297,12 +273,6 @@ restore_all:
mov #OFF_PC,r3
mov.l @(r0,r3),r1
mov.l r1,@r2 ! set pc
add #4*16+4,r0
lds.l @r0+,pr
add #4,r0 ! skip sr
ldc.l @r0+,gbr
lds.l @r0+,mach
lds.l @r0+,macl
get_current_thread_info r0, r1
mov.l $current_thread_info,r1
mov.l r0,@r1
@ -326,9 +296,8 @@ restore_all:
nop
.align 2
#ifdef CONFIG_TRACE_IRQFLAGS
1: .long trace_hardirqs_off
#endif
__md_bit:
.long 0x40000000
$current_thread_info:
.long __current_thread_info
$cpu_mode:

View file

@ -18,16 +18,17 @@
exception_entry:
no = 0
.rept 256
mov.l r0,@-sp
mov #no,r0
mov.l r1,@-sp
bra exception_trampoline
and #0xff,r0
mov #no,r1
no = no + 1
.endr
exception_trampoline:
mov.l r1,@-sp
mov.l $exception_handler,r1
jmp @r1
mov.l r0,@-sp
mov.l $exception_handler,r0
extu.b r1,r1
jmp @r0
extu.w r1,r1
.align 2
$exception_entry:
@ -41,6 +42,6 @@ $exception_handler:
ENTRY(vbr_base)
vector = 0
.rept 256
.long exception_entry + vector * 8
.long exception_entry + vector * 6
vector = vector + 1
.endr

View file

@ -96,8 +96,32 @@ static struct platform_device sci_device = {
},
};
static struct resource eth_resources[] = {
[0] = {
.start = 0xfb000000,
.end = 0xfb0001c8,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 85,
.end = 85,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device eth_device = {
.name = "sh-eth",
.id = -1,
.dev = {
.platform_data = (void *)1,
},
.num_resources = ARRAY_SIZE(eth_resources),
.resource = eth_resources,
};
static struct platform_device *sh7619_devices[] __initdata = {
&sci_device,
&eth_device,
};
static int __init sh7619_devices_setup(void)

View file

@ -4,7 +4,7 @@
obj-y := common.o probe.o opcode_helper.o
common-y += $(addprefix ../sh2/, ex.o entry.o)
common-y += ex.o entry.o
obj-$(CONFIG_SH_FPU) += fpu.o

View file

@ -0,0 +1,249 @@
/*
* arch/sh/kernel/cpu/sh2a/entry.S
*
* The SH-2A exception entry
*
* Copyright (C) 2008 Yoshinori Sato
* Based on arch/sh/kernel/cpu/sh2/entry.S
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/linkage.h>
#include <asm/asm-offsets.h>
#include <asm/thread_info.h>
#include <asm/cpu/mmu_context.h>
#include <asm/unistd.h>
#include <asm/errno.h>
#include <asm/page.h>
/* Offsets to the stack */
OFF_R0 = 0 /* Return value. New ABI also arg4 */
OFF_R1 = 4 /* New ABI: arg5 */
OFF_R2 = 8 /* New ABI: arg6 */
OFF_R3 = 12 /* New ABI: syscall_nr */
OFF_R4 = 16 /* New ABI: arg0 */
OFF_R5 = 20 /* New ABI: arg1 */
OFF_R6 = 24 /* New ABI: arg2 */
OFF_R7 = 28 /* New ABI: arg3 */
OFF_SP = (15*4)
OFF_PC = (16*4)
OFF_SR = (16*4+2*4)
OFF_TRA = (16*4+6*4)
#include <asm/entry-macros.S>
ENTRY(exception_handler)
! stack
! r0 <- point sp
! r1
! pc
! sr
! r0 = temporary
! r1 = vector (pseudo EXPEVT / INTEVT / TRA)
mov.l r2,@-sp
cli
mov.l $cpu_mode,r2
bld.b #6,@(0,r2) !previus SR.MD
bst.b #6,@(4*4,r15) !set cpu mode to SR.MD
bt 1f
! switch to kernel mode
bset.b #6,@(0,r2) !set SR.MD
mov.l $current_thread_info,r2
mov.l @r2,r2
mov #(THREAD_SIZE >> 8),r0
shll8 r0
add r2,r0 ! r0 = kernel stack tail
mov r15,r2 ! r2 = user stack top
mov r0,r15 ! switch kernel stack
mov.l r1,@-r15 ! TRA
sts.l macl, @-r15
sts.l mach, @-r15
stc.l gbr, @-r15
mov.l @(4*4,r2),r0
mov.l r0,@-r15 ! original SR
sts.l pr,@-r15
mov.l @(3*4,r2),r0
mov.l r0,@-r15 ! original PC
mov r2,r0
add #(3+2)*4,r0 ! rewind r0 - r3 + exception frame
lds r0,pr ! pr = original SP
movmu.l r3,@-r15 ! save regs
mov r2,r8 ! r8 = previus stack top
mov r1,r9 ! r9 = interrupt vector
! restore previous stack
mov.l @r8+,r2
mov.l @r8+,r0
mov.l @r8+,r1
bra 2f
movml.l r2,@-r15
1:
! in kernel exception
mov r15,r2
add #-((OFF_TRA + 4) - OFF_PC) + 5*4,r15
movmu.l r3,@-r15
mov r2,r8 ! r8 = previous stack top
mov r1,r9 ! r9 = interrupt vector
! restore exception frame & regs
mov.l @r8+,r2 ! old R2
mov.l @r8+,r0 ! old R0
mov.l @r8+,r1 ! old R1
mov.l @r8+,r10 ! old PC
mov.l @r8+,r11 ! old SR
movml.l r2,@-r15
mov.l r10,@(OFF_PC,r15)
mov.l r11,@(OFF_SR,r15)
mov.l r8,@(OFF_SP,r15) ! save old sp
mov r15,r8
add #OFF_TRA + 4,r8
mov.l r9,@-r8
sts.l macl,@-r8
sts.l mach,@-r8
stc.l gbr,@-r8
add #-4,r8
sts.l pr,@-r8
2:
! dispatch exception / interrupt
mov #64,r8
cmp/hs r8,r9
bt interrupt_entry ! vec >= 64 is interrupt
mov #32,r8
cmp/hs r8,r9
bt trap_entry ! 64 > vec >= 32 is trap
mov.l 4f,r8
mov r9,r4
shll2 r9
add r9,r8
mov.l @r8,r8 ! exception handler address
tst r8,r8
bf 3f
mov.l 8f,r8 ! unhandled exception
3:
mov.l 5f,r10
jmp @r8
lds r10,pr
interrupt_entry:
mov r9,r4
mov r15,r5
mov.l 7f,r8
mov.l 6f,r9
jmp @r8
lds r9,pr
.align 2
4: .long exception_handling_table
5: .long ret_from_exception
6: .long ret_from_irq
7: .long do_IRQ
8: .long exception_error
trap_entry:
mov #0x30,r8
cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall
bt 1f
add #-0x10,r9 ! convert SH2 to SH3/4 ABI
1:
shll2 r9 ! TRA
bra system_call ! jump common systemcall entry
mov r9,r8
#if defined(CONFIG_SH_STANDARD_BIOS)
/* Unwind the stack and jmp to the debug entry */
ENTRY(sh_bios_handler)
mov r15,r0
add #(22-4)*4-4,r0
ldc.l @r0+,gbr
lds.l @r0+,mach
lds.l @r0+,macl
mov r15,r0
mov.l @(OFF_SP,r0),r1
mov.l @(OFF_SR,r2),r3
mov.l r3,@-r1
mov.l @(OFF_SP,r2),r3
mov.l r3,@-r1
mov r15,r0
add #(22-4)*4-8,r0
mov.l 1f,r2
mov.l @r2,r2
stc sr,r3
mov.l r2,@r0
mov.l r3,@(4,r0)
mov.l r1,@(8,r0)
movml.l @r15+,r14
add #8,r15
lds.l @r15+, pr
rte
mov.l @r15+,r15
.align 2
1: .long gdb_vbr_vector
#endif /* CONFIG_SH_STANDARD_BIOS */
ENTRY(address_error_trap_handler)
mov r15,r4 ! regs
mov.l @(OFF_PC,r15),r6 ! pc
mov.l 1f,r0
jmp @r0
mov #0,r5 ! writeaccess is unknown
.align 2
1: .long do_address_error
restore_all:
stc sr,r0
or #0xf0,r0
ldc r0,sr ! all interrupt block (same BL = 1)
! restore special register
! overlap exception frame
mov r15,r0
add #17*4,r0
lds.l @r0+,pr
add #4,r0
ldc.l @r0+,gbr
lds.l @r0+,mach
lds.l @r0+,macl
mov r15,r0
mov.l $cpu_mode,r2
bld.b #6,@(OFF_SR,r15)
bst.b #6,@(0,r2) ! save CPU mode
mov.l @(OFF_SR,r0),r1
shll2 r1
shlr2 r1 ! clear MD bit
mov.l @(OFF_SP,r0),r2
add #-8,r2
mov.l r2,@(OFF_SP,r0) ! point exception frame top
mov.l r1,@(4,r2) ! set sr
mov.l @(OFF_PC,r0),r1
mov.l r1,@r2 ! set pc
get_current_thread_info r0, r1
mov.l $current_thread_info,r1
mov.l r0,@r1
movml.l @r15+,r14
mov.l @r15,r15
rte
nop
.align 2
$current_thread_info:
.long __current_thread_info
$cpu_mode:
.long __cpu_mode
! common exception handler
#include "../../entry-common.S"
.data
! cpu operation mode
! bit30 = MD (compatible SH3/4)
__cpu_mode:
.long 0x40000000
.section .bss
__current_thread_info:
.long 0
ENTRY(exception_handling_table)
.space 4*32

View file

@ -0,0 +1,72 @@
/*
* arch/sh/kernel/cpu/sh2a/ex.S
*
* The SH-2A exception vector table
*
* Copyright (C) 2008 Yoshinori Sato
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/linkage.h>
!
! convert Exception Vector to Exception Number
!
! exception no 0 to 255
exception_entry0:
no = 0
.rept 256
mov.l r1,@-sp
bra exception_trampoline0
mov #no,r1
no = no + 1
.endr
exception_trampoline0:
mov.l r0,@-sp
mov.l 1f,r0
extu.b r1,r1
jmp @r0
extu.w r1,r1
.align 2
1: .long exception_handler
! exception no 256 to 511
exception_entry1:
no = 0
.rept 256
mov.l r1,@-sp
bra exception_trampoline1
mov #no,r1
no = no + 1
.endr
exception_trampoline1:
mov.l r0,@-sp
extu.b r1,r1
movi20 #0x100,r0
add r0,r1
mov.l 1f,r0
jmp @r0
extu.w r1,r1
.align 2
1: .long exception_handler
!
! Exception Vector Base
!
.align 2
ENTRY(vbr_base)
vector = 0
.rept 256
.long exception_entry0 + vector * 6
vector = vector + 1
.endr
.rept 256
.long exception_entry1 + vector * 6
vector = vector + 1
.endr

View file

@ -4,7 +4,7 @@
* The SH-3 and SH-4 exception vector table.
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
* Copyright (C) 2003 - 2006 Paul Mundt
* Copyright (C) 2003 - 2008 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -12,13 +12,30 @@
*/
#include <linux/linkage.h>
#if !defined(CONFIG_MMU)
#define tlb_miss_load exception_error
#define tlb_miss_store exception_error
#define initial_page_write exception_error
#define tlb_protection_violation_load exception_error
#define tlb_protection_violation_store exception_error
#define address_error_load exception_error
#define address_error_store exception_error
#endif
#if !defined(CONFIG_SH_FPU)
#define fpu_error_trap_handler exception_error
#endif
#if !defined(CONFIG_KGDB_NMI)
#define kgdb_handle_exception exception_error
#endif
.align 2
.data
ENTRY(exception_handling_table)
.long exception_error /* 000 */
.long exception_error
#if defined(CONFIG_MMU)
.long tlb_miss_load /* 040 */
.long tlb_miss_store
.long initial_page_write
@ -26,30 +43,13 @@ ENTRY(exception_handling_table)
.long tlb_protection_violation_store
.long address_error_load
.long address_error_store /* 100 */
#else
.long exception_error ! tlb miss load /* 040 */
.long exception_error ! tlb miss store
.long exception_error ! initial page write
.long exception_error ! tlb prot violation load
.long exception_error ! tlb prot violation store
.long exception_error ! address error load
.long exception_error ! address error store /* 100 */
#endif
#if defined(CONFIG_SH_FPU)
.long fpu_error_trap_handler /* 120 */
#else
.long exception_error /* 120 */
#endif
.long exception_error /* 140 */
.long system_call ! Unconditional Trap /* 160 */
.long exception_error ! reserved_instruction (filled by trap_init) /* 180 */
.long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
ENTRY(nmi_slot)
#if defined (CONFIG_KGDB_NMI)
.long kgdb_handle_exception /* 1C0 */ ! Allow trap to debugger
#else
.long exception_none /* 1C0 */ ! Not implemented yet
#endif
ENTRY(user_break_point_trap)
.long break_point_trap /* 1E0 */

View file

@ -50,14 +50,18 @@ int __init detect_cpu_and_cache_system(void)
boot_cpu_data.dcache.ways = 1;
boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
/* We don't know the chip cut */
boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1;
/*
* Setup some generic flags we can probe on SH-4A parts
*/
if (((pvr >> 24) & 0xff) == 0x10) {
if (((pvr >> 16) & 0xff) == 0x10) {
if ((cvr & 0x10000000) == 0)
boot_cpu_data.flags |= CPU_HAS_DSP;
boot_cpu_data.flags |= CPU_HAS_LLSC;
boot_cpu_data.cut_major = pvr & 0x7f;
}
/* FPU detection works for everyone */

View file

@ -21,7 +21,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o
clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o

View file

@ -1,99 +0,0 @@
/*
* arch/sh/kernel/cpu/sh4a/clock-sh7343.c
*
* SH7343/SH7722 support for the clock framework
*
* Copyright (C) 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/clock.h>
#include <asm/freq.h>
/*
* SH7343/SH7722 uses a common set of multipliers and divisors, so this
* is quite simple..
*/
static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
#define pll_calc() (((ctrl_inl(FRQCR) >> 24) & 0x1f) + 1)
static void master_clk_init(struct clk *clk)
{
clk->parent = clk_get(NULL, "cpu_clk");
}
static void master_clk_recalc(struct clk *clk)
{
int idx = (ctrl_inl(FRQCR) & 0x000f);
clk->rate *= clk->parent->rate * multipliers[idx] / divisors[idx];
}
static struct clk_ops sh7343_master_clk_ops = {
.init = master_clk_init,
.recalc = master_clk_recalc,
};
static void module_clk_init(struct clk *clk)
{
clk->parent = NULL;
clk->rate = CONFIG_SH_PCLK_FREQ;
}
static struct clk_ops sh7343_module_clk_ops = {
.init = module_clk_init,
};
static void bus_clk_init(struct clk *clk)
{
clk->parent = clk_get(NULL, "cpu_clk");
}
static void bus_clk_recalc(struct clk *clk)
{
int idx = (ctrl_inl(FRQCR) >> 8) & 0x000f;
clk->rate = clk->parent->rate * multipliers[idx] / divisors[idx];
}
static struct clk_ops sh7343_bus_clk_ops = {
.init = bus_clk_init,
.recalc = bus_clk_recalc,
};
static void cpu_clk_init(struct clk *clk)
{
clk->parent = clk_get(NULL, "module_clk");
clk->flags |= CLK_RATE_PROPAGATES;
clk_set_rate(clk, clk_get_rate(clk));
}
static void cpu_clk_recalc(struct clk *clk)
{
int idx = (ctrl_inl(FRQCR) >> 20) & 0x000f;
clk->rate = clk->parent->rate * pll_calc() *
multipliers[idx] / divisors[idx];
}
static struct clk_ops sh7343_cpu_clk_ops = {
.init = cpu_clk_init,
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7343_clk_ops[] = {
&sh7343_master_clk_ops,
&sh7343_module_clk_ops,
&sh7343_bus_clk_ops,
&sh7343_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7343_clk_ops))
*ops = sh7343_clk_ops[idx];
}

View file

@ -1,7 +1,7 @@
/*
* arch/sh/kernel/cpu/sh4a/clock-sh7722.c
*
* SH7722 & SH7366 support for the clock framework
* SH7343, SH7722, SH7723 & SH7366 support for the clock framework
*
* Copyright (c) 2006-2007 Nomad Global Solutions Inc
* Based on code for sh7343 by Paul Mundt
@ -14,6 +14,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/stringify.h>
#include <asm/clock.h>
#include <asm/freq.h>
@ -411,40 +412,40 @@ static struct clk_ops sh7722_frqcr_clk_ops = {
* clock ops methods for SIU A/B and IrDA clock
*
*/
static int sh7722_siu_which(struct clk *clk)
#ifndef CONFIG_CPU_SUBTYPE_SH7343
static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
{
if (!strcmp(clk->name, "siu_a_clk"))
return 0;
if (!strcmp(clk->name, "siu_b_clk"))
return 1;
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
if (!strcmp(clk->name, "irda_clk"))
return 2;
#endif
return -EINVAL;
unsigned long r;
int div;
r = ctrl_inl(clk->arch_flags);
div = sh7722_find_divisors(clk->parent->rate, rate);
if (div < 0)
return div;
r = (r & ~0xF) | div;
ctrl_outl(r, clk->arch_flags);
return 0;
}
static unsigned long sh7722_siu_regs[] = {
[0] = SCLKACR,
[1] = SCLKBCR,
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
[2] = IrDACLKCR,
#endif
};
static void sh7722_siu_recalc(struct clk *clk)
{
unsigned long r;
r = ctrl_inl(clk->arch_flags);
clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
}
static int sh7722_siu_start_stop(struct clk *clk, int enable)
{
int siu = sh7722_siu_which(clk);
unsigned long r;
if (siu < 0)
return siu;
BUG_ON(siu > 2);
r = ctrl_inl(sh7722_siu_regs[siu]);
r = ctrl_inl(clk->arch_flags);
if (enable)
ctrl_outl(r & ~(1 << 8), sh7722_siu_regs[siu]);
ctrl_outl(r & ~(1 << 8), clk->arch_flags);
else
ctrl_outl(r | (1 << 8), sh7722_siu_regs[siu]);
ctrl_outl(r | (1 << 8), clk->arch_flags);
return 0;
}
@ -458,6 +459,15 @@ static void sh7722_siu_disable(struct clk *clk)
sh7722_siu_start_stop(clk, 0);
}
static struct clk_ops sh7722_siu_clk_ops = {
.recalc = sh7722_siu_recalc,
.set_rate = sh7722_siu_set_rate,
.enable = sh7722_siu_enable,
.disable = sh7722_siu_disable,
};
#endif /* CONFIG_CPU_SUBTYPE_SH7343 */
static void sh7722_video_enable(struct clk *clk)
{
unsigned long r;
@ -494,43 +504,6 @@ static void sh7722_video_recalc(struct clk *clk)
clk->rate = clk->parent->rate / ((r & 0x3F) + 1);
}
static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
{
int siu = sh7722_siu_which(clk);
unsigned long r;
int div;
if (siu < 0)
return siu;
BUG_ON(siu > 2);
r = ctrl_inl(sh7722_siu_regs[siu]);
div = sh7722_find_divisors(clk->parent->rate, rate);
if (div < 0)
return div;
r = (r & ~0xF) | div;
ctrl_outl(r, sh7722_siu_regs[siu]);
return 0;
}
static void sh7722_siu_recalc(struct clk *clk)
{
int siu = sh7722_siu_which(clk);
unsigned long r;
if (siu < 0)
return /* siu */ ;
BUG_ON(siu > 2);
r = ctrl_inl(sh7722_siu_regs[siu]);
clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
}
static struct clk_ops sh7722_siu_clk_ops = {
.recalc = sh7722_siu_recalc,
.set_rate = sh7722_siu_set_rate,
.enable = sh7722_siu_enable,
.disable = sh7722_siu_disable,
};
static struct clk_ops sh7722_video_clk_ops = {
.recalc = sh7722_video_recalc,
.set_rate = sh7722_video_set_rate,
@ -560,6 +533,9 @@ static struct clk sh7722_sdram_clock = {
.ops = &sh7722_frqcr_clk_ops,
};
#ifndef CONFIG_CPU_SUBTYPE_SH7343
/*
* these three clocks - SIU A, SIU B, IrDA - share the same clk_ops
* methods of clk_ops determine which register they should access by
@ -567,35 +543,150 @@ static struct clk sh7722_sdram_clock = {
*/
static struct clk sh7722_siu_a_clock = {
.name = "siu_a_clk",
.arch_flags = SCLKACR,
.ops = &sh7722_siu_clk_ops,
};
static struct clk sh7722_siu_b_clock = {
.name = "siu_b_clk",
.arch_flags = SCLKBCR,
.ops = &sh7722_siu_clk_ops,
};
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
static struct clk sh7722_irda_clock = {
.name = "irda_clk",
.arch_flags = IrDACLKCR,
.ops = &sh7722_siu_clk_ops,
};
#endif
#endif /* CONFIG_CPU_SUBTYPE_SH7343 */
static struct clk sh7722_video_clock = {
.name = "video_clk",
.ops = &sh7722_video_clk_ops,
};
static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg,
int enable)
{
unsigned long bit = clk->arch_flags;
unsigned long r;
r = ctrl_inl(reg);
if (enable)
r &= ~(1 << bit);
else
r |= (1 << bit);
ctrl_outl(r, reg);
return 0;
}
static void sh7722_mstpcr0_enable(struct clk *clk)
{
sh7722_mstpcr_start_stop(clk, MSTPCR0, 1);
}
static void sh7722_mstpcr0_disable(struct clk *clk)
{
sh7722_mstpcr_start_stop(clk, MSTPCR0, 0);
}
static void sh7722_mstpcr1_enable(struct clk *clk)
{
sh7722_mstpcr_start_stop(clk, MSTPCR1, 1);
}
static void sh7722_mstpcr1_disable(struct clk *clk)
{
sh7722_mstpcr_start_stop(clk, MSTPCR1, 0);
}
static void sh7722_mstpcr2_enable(struct clk *clk)
{
sh7722_mstpcr_start_stop(clk, MSTPCR2, 1);
}
static void sh7722_mstpcr2_disable(struct clk *clk)
{
sh7722_mstpcr_start_stop(clk, MSTPCR2, 0);
}
static struct clk_ops sh7722_mstpcr0_clk_ops = {
.enable = sh7722_mstpcr0_enable,
.disable = sh7722_mstpcr0_disable,
};
static struct clk_ops sh7722_mstpcr1_clk_ops = {
.enable = sh7722_mstpcr1_enable,
.disable = sh7722_mstpcr1_disable,
};
static struct clk_ops sh7722_mstpcr2_clk_ops = {
.enable = sh7722_mstpcr2_enable,
.disable = sh7722_mstpcr2_disable,
};
#define DECLARE_MSTPCRN(regnr, bitnr, bitstr) \
{ \
.name = "mstp" __stringify(regnr) bitstr, \
.arch_flags = bitnr, \
.ops = &sh7722_mstpcr ## regnr ## _clk_ops, \
}
#define DECLARE_MSTPCR(regnr) \
DECLARE_MSTPCRN(regnr, 31, "31"), \
DECLARE_MSTPCRN(regnr, 30, "30"), \
DECLARE_MSTPCRN(regnr, 29, "29"), \
DECLARE_MSTPCRN(regnr, 28, "28"), \
DECLARE_MSTPCRN(regnr, 27, "27"), \
DECLARE_MSTPCRN(regnr, 26, "26"), \
DECLARE_MSTPCRN(regnr, 25, "25"), \
DECLARE_MSTPCRN(regnr, 24, "24"), \
DECLARE_MSTPCRN(regnr, 23, "23"), \
DECLARE_MSTPCRN(regnr, 22, "22"), \
DECLARE_MSTPCRN(regnr, 21, "21"), \
DECLARE_MSTPCRN(regnr, 20, "20"), \
DECLARE_MSTPCRN(regnr, 19, "19"), \
DECLARE_MSTPCRN(regnr, 18, "18"), \
DECLARE_MSTPCRN(regnr, 17, "17"), \
DECLARE_MSTPCRN(regnr, 16, "16"), \
DECLARE_MSTPCRN(regnr, 15, "15"), \
DECLARE_MSTPCRN(regnr, 14, "14"), \
DECLARE_MSTPCRN(regnr, 13, "13"), \
DECLARE_MSTPCRN(regnr, 12, "12"), \
DECLARE_MSTPCRN(regnr, 11, "11"), \
DECLARE_MSTPCRN(regnr, 10, "10"), \
DECLARE_MSTPCRN(regnr, 9, "09"), \
DECLARE_MSTPCRN(regnr, 8, "08"), \
DECLARE_MSTPCRN(regnr, 7, "07"), \
DECLARE_MSTPCRN(regnr, 6, "06"), \
DECLARE_MSTPCRN(regnr, 5, "05"), \
DECLARE_MSTPCRN(regnr, 4, "04"), \
DECLARE_MSTPCRN(regnr, 3, "03"), \
DECLARE_MSTPCRN(regnr, 2, "02"), \
DECLARE_MSTPCRN(regnr, 1, "01"), \
DECLARE_MSTPCRN(regnr, 0, "00")
static struct clk sh7722_mstpcr[] = {
DECLARE_MSTPCR(0),
DECLARE_MSTPCR(1),
DECLARE_MSTPCR(2),
};
static struct clk *sh7722_clocks[] = {
&sh7722_umem_clock,
&sh7722_sh_clock,
&sh7722_peripheral_clock,
&sh7722_sdram_clock,
#ifndef CONFIG_CPU_SUBTYPE_SH7343
&sh7722_siu_a_clock,
&sh7722_siu_b_clock,
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
&sh7722_irda_clock,
#endif
#endif
&sh7722_video_clock,
};
@ -629,5 +720,11 @@ int __init arch_clk_init(void)
clk_register(sh7722_clocks[i]);
}
clk_put(master);
for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr); i++) {
pr_debug( "Registering mstpcr '%s'\n", sh7722_mstpcr[i].name);
clk_register(&sh7722_mstpcr[i]);
}
return 0;
}

View file

@ -11,6 +11,104 @@
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/uio_driver.h>
#include <asm/clock.h>
static struct resource iic0_resources[] = {
[0] = {
.name = "IIC0",
.start = 0x04470000,
.end = 0x04470017,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 96,
.end = 99,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device iic0_device = {
.name = "i2c-sh_mobile",
.num_resources = ARRAY_SIZE(iic0_resources),
.resource = iic0_resources,
};
static struct resource iic1_resources[] = {
[0] = {
.name = "IIC1",
.start = 0x04750000,
.end = 0x04750017,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 44,
.end = 47,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device iic1_device = {
.name = "i2c-sh_mobile",
.num_resources = ARRAY_SIZE(iic1_resources),
.resource = iic1_resources,
};
static struct uio_info vpu_platform_data = {
.name = "VPU4",
.version = "0",
.irq = 60,
};
static struct resource vpu_resources[] = {
[0] = {
.name = "VPU",
.start = 0xfe900000,
.end = 0xfe9022eb,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device vpu_device = {
.name = "uio_pdrv_genirq",
.id = 0,
.dev = {
.platform_data = &vpu_platform_data,
},
.resource = vpu_resources,
.num_resources = ARRAY_SIZE(vpu_resources),
};
static struct uio_info veu_platform_data = {
.name = "VEU",
.version = "0",
.irq = 54,
};
static struct resource veu_resources[] = {
[0] = {
.name = "VEU",
.start = 0xfe920000,
.end = 0xfe9200b7,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device veu_device = {
.name = "uio_pdrv_genirq",
.id = 1,
.dev = {
.platform_data = &veu_platform_data,
},
.resource = veu_resources,
.num_resources = ARRAY_SIZE(veu_resources),
};
static struct plat_sci_port sci_platform_data[] = {
{
@ -32,16 +130,171 @@ static struct platform_device sci_device = {
};
static struct platform_device *sh7343_devices[] __initdata = {
&iic0_device,
&iic1_device,
&sci_device,
&vpu_device,
&veu_device,
};
static int __init sh7343_devices_setup(void)
{
clk_always_enable("mstp031"); /* TLB */
clk_always_enable("mstp030"); /* IC */
clk_always_enable("mstp029"); /* OC */
clk_always_enable("mstp028"); /* URAM */
clk_always_enable("mstp026"); /* XYMEM */
clk_always_enable("mstp023"); /* INTC3 */
clk_always_enable("mstp022"); /* INTC */
clk_always_enable("mstp020"); /* SuperHyway */
clk_always_enable("mstp109"); /* I2C0 */
clk_always_enable("mstp108"); /* I2C1 */
clk_always_enable("mstp202"); /* VEU */
clk_always_enable("mstp201"); /* VPU */
platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
return platform_add_devices(sh7343_devices,
ARRAY_SIZE(sh7343_devices));
}
__initcall(sh7343_devices_setup);
enum {
UNUSED = 0,
/* interrupt sources */
IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
DMAC0, DMAC1, DMAC2, DMAC3,
VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU,
MFI, VPU, TPU, Z3D4, USBI0, USBI1,
MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY,
DMAC4, DMAC5, DMAC_DADERR,
KEYSC,
SCIF, SCIF1, SCIF2, SCIF3, SCIF4,
SIOF0, SIOF1, SIO,
FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI,
SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI,
IRDA,
SDHI0, SDHI1, SDHI2, SDHI3,
CMT, TSIF, SIU,
TMU0, TMU1, TMU2,
JPU, LCDC,
/* interrupt groups */
DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB,
};
static struct intc_vect vectors[] __initdata = {
INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
INTC_VECT(I2C1_ALI, 0x780), INTC_VECT(I2C1_TACKI, 0x7a0),
INTC_VECT(I2C1_WAITI, 0x7c0), INTC_VECT(I2C1_DTEI, 0x7e0),
INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820),
INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860),
INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0),
INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0),
INTC_VECT(MFI, 0x900), INTC_VECT(VPU, 0x980),
INTC_VECT(TPU, 0x9a0), INTC_VECT(Z3D4, 0x9e0),
INTC_VECT(USBI0, 0xa20), INTC_VECT(USBI1, 0xa40),
INTC_VECT(MMC_ERR, 0xb00), INTC_VECT(MMC_TRAN, 0xb20),
INTC_VECT(MMC_FSTAT, 0xb40), INTC_VECT(MMC_FRDY, 0xb60),
INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0),
INTC_VECT(DMAC_DADERR, 0xbc0), INTC_VECT(KEYSC, 0xbe0),
INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIF1, 0xc20),
INTC_VECT(SCIF2, 0xc40), INTC_VECT(SCIF3, 0xc60),
INTC_VECT(SIOF0, 0xc80), INTC_VECT(SIOF1, 0xca0),
INTC_VECT(SIO, 0xd00),
INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0),
INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20),
INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60),
INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0),
INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0),
INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
INTC_VECT(SIU, 0xf80),
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2, 0x440),
INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580),
};
static struct intc_group groups[] __initdata = {
INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),
INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU),
INTC_GROUP(MMC, MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR),
INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR),
INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI),
INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI),
INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI),
INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
INTC_GROUP(USB, USBI0, USBI1),
};
static struct intc_mask_reg mask_registers[] __initdata = {
{ 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
{ VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } },
{ 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
{ 0, 0, 0, VPU, 0, 0, 0, MFI } },
{ 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
{ SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 0, 0, 0, IRDA } },
{ 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
{ 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
{ 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
{ KEYSC, DMAC_DADERR, DMAC5, DMAC4, SCIF3, SCIF2, SCIF1, SCIF } },
{ 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
{ 0, 0, 0, SIO, Z3D4, 0, SIOF1, SIOF0 } },
{ 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
{ I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
{ 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
{ SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } },
{ 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
{ 0, 0, 0, CMT, 0, USBI1, USBI0 } },
{ 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
{ MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR } },
{ 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
{ I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI, TPU, 0, 0, TSIF } },
{ 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static struct intc_prio_reg prio_registers[] __initdata = {
{ 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
{ 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
{ 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, MFI, VPU } },
{ 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } },
{ 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIF1, SCIF2, SCIF3 } },
{ 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C0 } },
{ 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, I2C1 } },
{ 0xa4080024, 0, 16, 4, /* IPRJ */ { Z3D4, 0, SIU } },
{ 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
{ 0xa408002c, 0, 16, 4, /* IPRL */ { 0, 0, TPU } },
{ 0xa4140010, 0, 32, 4, /* INTPRI00 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static struct intc_sense_reg sense_registers[] __initdata = {
{ 0xa414001c, 16, 2, /* ICR1 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static struct intc_mask_reg ack_registers[] __initdata = {
{ 0xa4140024, 0, 8, /* INTREQ00 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups,
mask_registers, prio_registers, sense_registers,
ack_registers);
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
}

View file

@ -13,6 +13,112 @@
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/uio_driver.h>
#include <asm/clock.h>
static struct resource iic_resources[] = {
[0] = {
.name = "IIC",
.start = 0x04470000,
.end = 0x04470017,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 96,
.end = 99,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device iic_device = {
.name = "i2c-sh_mobile",
.num_resources = ARRAY_SIZE(iic_resources),
.resource = iic_resources,
};
static struct uio_info vpu_platform_data = {
.name = "VPU5",
.version = "0",
.irq = 60,
};
static struct resource vpu_resources[] = {
[0] = {
.name = "VPU",
.start = 0xfe900000,
.end = 0xfe902807,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device vpu_device = {
.name = "uio_pdrv_genirq",
.id = 0,
.dev = {
.platform_data = &vpu_platform_data,
},
.resource = vpu_resources,
.num_resources = ARRAY_SIZE(vpu_resources),
};
static struct uio_info veu0_platform_data = {
.name = "VEU",
.version = "0",
.irq = 54,
};
static struct resource veu0_resources[] = {
[0] = {
.name = "VEU(1)",
.start = 0xfe920000,
.end = 0xfe9200b7,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device veu0_device = {
.name = "uio_pdrv_genirq",
.id = 1,
.dev = {
.platform_data = &veu0_platform_data,
},
.resource = veu0_resources,
.num_resources = ARRAY_SIZE(veu0_resources),
};
static struct uio_info veu1_platform_data = {
.name = "VEU",
.version = "0",
.irq = 27,
};
static struct resource veu1_resources[] = {
[0] = {
.name = "VEU(2)",
.start = 0xfe924000,
.end = 0xfe9240b7,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device veu1_device = {
.name = "uio_pdrv_genirq",
.id = 2,
.dev = {
.platform_data = &veu1_platform_data,
},
.resource = veu1_resources,
.num_resources = ARRAY_SIZE(veu1_resources),
};
static struct plat_sci_port sci_platform_data[] = {
{
@ -34,11 +140,32 @@ static struct platform_device sci_device = {
};
static struct platform_device *sh7366_devices[] __initdata = {
&iic_device,
&sci_device,
&vpu_device,
&veu0_device,
&veu1_device,
};
static int __init sh7366_devices_setup(void)
{
clk_always_enable("mstp031"); /* TLB */
clk_always_enable("mstp030"); /* IC */
clk_always_enable("mstp029"); /* OC */
clk_always_enable("mstp028"); /* RSMEM */
clk_always_enable("mstp026"); /* XYMEM */
clk_always_enable("mstp023"); /* INTC3 */
clk_always_enable("mstp022"); /* INTC */
clk_always_enable("mstp020"); /* SuperHyway */
clk_always_enable("mstp109"); /* I2C */
clk_always_enable("mstp207"); /* VEU-2 */
clk_always_enable("mstp202"); /* VEU-1 */
clk_always_enable("mstp201"); /* VPU */
platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
return platform_add_devices(sh7366_devices,
ARRAY_SIZE(sh7366_devices));
}
@ -97,7 +224,7 @@ static struct intc_vect vectors[] __initdata = {
INTC_VECT(SIU, 0xf80),
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2, 0x440),
INTC_VECT(VEU2, 0x580), INTC_VECT(LCDC, 0x580),
INTC_VECT(VEU2, 0x560), INTC_VECT(LCDC, 0x580),
};
static struct intc_group groups[] __initdata = {
@ -163,8 +290,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC(intc_desc, "sh7366", vectors, groups,
mask_registers, prio_registers, sense_registers);
static struct intc_mask_reg ack_registers[] __initdata = {
{ 0xa4140024, 0, 8, /* INTREQ00 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups,
mask_registers, prio_registers, sense_registers,
ack_registers);
void __init plat_irq_setup(void)
{

View file

@ -12,6 +12,8 @@
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/mm.h>
#include <linux/uio_driver.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
static struct resource usbf_resources[] = {
@ -59,6 +61,62 @@ static struct platform_device iic_device = {
.resource = iic_resources,
};
static struct uio_info vpu_platform_data = {
.name = "VPU4",
.version = "0",
.irq = 60,
};
static struct resource vpu_resources[] = {
[0] = {
.name = "VPU",
.start = 0xfe900000,
.end = 0xfe9022eb,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device vpu_device = {
.name = "uio_pdrv_genirq",
.id = 0,
.dev = {
.platform_data = &vpu_platform_data,
},
.resource = vpu_resources,
.num_resources = ARRAY_SIZE(vpu_resources),
};
static struct uio_info veu_platform_data = {
.name = "VEU",
.version = "0",
.irq = 54,
};
static struct resource veu_resources[] = {
[0] = {
.name = "VEU",
.start = 0xfe920000,
.end = 0xfe9200b7,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device veu_device = {
.name = "uio_pdrv_genirq",
.id = 1,
.dev = {
.platform_data = &veu_platform_data,
},
.resource = veu_resources,
.num_resources = ARRAY_SIZE(veu_resources),
};
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
@ -95,10 +153,27 @@ static struct platform_device *sh7722_devices[] __initdata = {
&usbf_device,
&iic_device,
&sci_device,
&vpu_device,
&veu_device,
};
static int __init sh7722_devices_setup(void)
{
clk_always_enable("mstp031"); /* TLB */
clk_always_enable("mstp030"); /* IC */
clk_always_enable("mstp029"); /* OC */
clk_always_enable("mstp028"); /* URAM */
clk_always_enable("mstp026"); /* XYMEM */
clk_always_enable("mstp022"); /* INTC */
clk_always_enable("mstp020"); /* SuperHyway */
clk_always_enable("mstp109"); /* I2C */
clk_always_enable("mstp211"); /* USB */
clk_always_enable("mstp202"); /* VEU */
clk_always_enable("mstp201"); /* VPU */
platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
return platform_add_devices(sh7722_devices,
ARRAY_SIZE(sh7722_devices));
}
@ -229,8 +304,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups,
mask_registers, prio_registers, sense_registers);
static struct intc_mask_reg ack_registers[] __initdata = {
{ 0xa4140024, 0, 8, /* INTREQ00 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups,
mask_registers, prio_registers, sense_registers,
ack_registers);
void __init plat_irq_setup(void)
{

View file

@ -12,8 +12,94 @@
#include <linux/serial.h>
#include <linux/mm.h>
#include <linux/serial_sci.h>
#include <linux/uio_driver.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
static struct uio_info vpu_platform_data = {
.name = "VPU5",
.version = "0",
.irq = 60,
};
static struct resource vpu_resources[] = {
[0] = {
.name = "VPU",
.start = 0xfe900000,
.end = 0xfe902807,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device vpu_device = {
.name = "uio_pdrv_genirq",
.id = 0,
.dev = {
.platform_data = &vpu_platform_data,
},
.resource = vpu_resources,
.num_resources = ARRAY_SIZE(vpu_resources),
};
static struct uio_info veu0_platform_data = {
.name = "VEU",
.version = "0",
.irq = 54,
};
static struct resource veu0_resources[] = {
[0] = {
.name = "VEU2H0",
.start = 0xfe920000,
.end = 0xfe92027b,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device veu0_device = {
.name = "uio_pdrv_genirq",
.id = 1,
.dev = {
.platform_data = &veu0_platform_data,
},
.resource = veu0_resources,
.num_resources = ARRAY_SIZE(veu0_resources),
};
static struct uio_info veu1_platform_data = {
.name = "VEU",
.version = "0",
.irq = 27,
};
static struct resource veu1_resources[] = {
[0] = {
.name = "VEU2H1",
.start = 0xfe924000,
.end = 0xfe92427b,
.flags = IORESOURCE_MEM,
},
[1] = {
/* place holder for contiguous memory */
},
};
static struct platform_device veu1_device = {
.name = "uio_pdrv_genirq",
.id = 2,
.dev = {
.platform_data = &veu1_platform_data,
},
.resource = veu1_resources,
.num_resources = ARRAY_SIZE(veu1_resources),
};
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
@ -113,14 +199,56 @@ static struct platform_device sh7723_usb_host_device = {
.resource = sh7723_usb_host_resources,
};
static struct resource iic_resources[] = {
[0] = {
.name = "IIC",
.start = 0x04470000,
.end = 0x04470017,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 96,
.end = 99,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device iic_device = {
.name = "i2c-sh_mobile",
.num_resources = ARRAY_SIZE(iic_resources),
.resource = iic_resources,
};
static struct platform_device *sh7723_devices[] __initdata = {
&sci_device,
&rtc_device,
&iic_device,
&sh7723_usb_host_device,
&vpu_device,
&veu0_device,
&veu1_device,
};
static int __init sh7723_devices_setup(void)
{
clk_always_enable("mstp031"); /* TLB */
clk_always_enable("mstp030"); /* IC */
clk_always_enable("mstp029"); /* OC */
clk_always_enable("mstp024"); /* FPU */
clk_always_enable("mstp022"); /* INTC */
clk_always_enable("mstp020"); /* SuperHyway */
clk_always_enable("mstp000"); /* MERAM */
clk_always_enable("mstp109"); /* I2C */
clk_always_enable("mstp108"); /* RTC */
clk_always_enable("mstp211"); /* USB */
clk_always_enable("mstp206"); /* VEU2H1 */
clk_always_enable("mstp202"); /* VEU2H0 */
clk_always_enable("mstp201"); /* VPU */
platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
return platform_add_devices(sh7723_devices,
ARRAY_SIZE(sh7723_devices));
}
@ -326,8 +454,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC(intc_desc, "sh7723", vectors, groups,
mask_registers, prio_registers, sense_registers);
static struct intc_mask_reg ack_registers[] __initdata = {
{ 0xa4140024, 0, 8, /* INTREQ00 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups,
mask_registers, prio_registers, sense_registers,
ack_registers);
void __init plat_irq_setup(void)
{

View file

@ -3,6 +3,7 @@
*
* Copyright (C) 2006 Paul Mundt
* Copyright (C) 2007 Yoshihiro Shimoda
* Copyright (C) 2008 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -55,6 +56,11 @@ static struct plat_sci_port sci_platform_data[] = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 76, 77, 79, 78 },
}, {
.mapbase = 0xffe10000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 104, 105, 107, 106 },
}, {
.flags = 0,
}
@ -208,8 +214,8 @@ static struct intc_vect vectors[] __initdata = {
INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20),
INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60),
INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
};
@ -290,9 +296,14 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = {
IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC(intc_irq_desc, "sh7763-irq", irq_vectors,
NULL, irq_mask_registers, irq_prio_registers,
irq_sense_registers);
static struct intc_mask_reg irq_ack_registers[] __initdata = {
{ 0xffd00024, 0, 32, /* INTREQ */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7763-irq", irq_vectors,
NULL, irq_mask_registers, irq_prio_registers,
irq_sense_registers, irq_ack_registers);
/* External interrupt pins in IRL mode */

View file

@ -217,9 +217,14 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = {
IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors,
NULL, irq_mask_registers, irq_prio_registers,
irq_sense_registers);
static struct intc_mask_reg irq_ack_registers[] __initdata = {
{ 0xffd00024, 0, 32, /* INTREQ */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7780-irq", irq_vectors,
NULL, irq_mask_registers, irq_prio_registers,
irq_sense_registers, irq_ack_registers);
/* External interrupt pins in IRL mode */

View file

@ -238,13 +238,18 @@ static struct intc_sense_reg sense_registers[] __initdata = {
IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123,
NULL, mask_registers, prio_registers,
sense_registers);
static struct intc_mask_reg ack_registers[] __initdata = {
{ 0xffd00024, 0, 32, /* INTREQ */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567,
NULL, mask_registers, prio_registers,
sense_registers);
static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7785-irq0123",
vectors_irq0123, NULL, mask_registers,
prio_registers, sense_registers, ack_registers);
static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7785-irq4567",
vectors_irq4567, NULL, mask_registers,
prio_registers, sense_registers, ack_registers);
/* External interrupt pins in IRL mode */

View file

@ -192,7 +192,7 @@ work_resched:
.align 2
1: .long schedule
2: .long do_notify_resume
3: .long restore_all
3: .long resume_userspace
#ifdef CONFIG_TRACE_IRQFLAGS
4: .long trace_hardirqs_on
5: .long trace_hardirqs_off

View file

@ -34,18 +34,6 @@ void (*pm_idle)(void);
void (*pm_power_off)(void);
EXPORT_SYMBOL(pm_power_off);
void disable_hlt(void)
{
hlt_counter++;
}
EXPORT_SYMBOL(disable_hlt);
void enable_hlt(void)
{
hlt_counter--;
}
EXPORT_SYMBOL(enable_hlt);
static int __init nohlt_setup(char *__unused)
{
hlt_counter = 1;
@ -60,7 +48,7 @@ static int __init hlt_setup(char *__unused)
}
__setup("hlt", hlt_setup);
void default_idle(void)
static void default_idle(void)
{
if (!hlt_counter) {
clear_thread_flag(TIF_POLLING_NRFLAG);

View file

@ -36,16 +36,6 @@ static int hlt_counter = 1;
#define HARD_IDLE_TIMEOUT (HZ / 3)
void disable_hlt(void)
{
hlt_counter++;
}
void enable_hlt(void)
{
hlt_counter--;
}
static int __init nohlt_setup(char *__unused)
{
hlt_counter = 1;

View file

@ -240,6 +240,29 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
}
break;
}
#endif
#ifdef CONFIG_BINFMT_ELF_FDPIC
case PTRACE_GETFDPIC: {
unsigned long tmp = 0;
switch (addr) {
case PTRACE_GETFDPIC_EXEC:
tmp = child->mm->context.exec_fdpic_loadmap;
break;
case PTRACE_GETFDPIC_INTERP:
tmp = child->mm->context.interp_fdpic_loadmap;
break;
default:
break;
}
ret = 0;
if (put_user(tmp, (unsigned long *) data)) {
ret = -EFAULT;
break;
}
break;
}
#endif
default:
ret = ptrace_request(child, request, addr, data);

View file

@ -398,6 +398,7 @@ const char *get_cpu_subtype(struct sh_cpuinfo *c)
{
return cpu_name[c->type];
}
EXPORT_SYMBOL(get_cpu_subtype);
#ifdef CONFIG_PROC_FS
/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
@ -452,6 +453,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "processor\t: %d\n", cpu);
seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
if (c->cut_major == -1)
seq_printf(m, "cut\t\t: unknown\n");
else if (c->cut_minor == -1)
seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
else
seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
show_cpuflags(m, c);

View file

@ -33,6 +33,11 @@
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
struct fdpic_func_descriptor {
unsigned long text;
unsigned long GOT;
};
/*
* Atomically swap in the new signal mask, and wait for a signal.
*/
@ -368,6 +373,7 @@ static int setup_frame(int sig, struct k_sigaction *ka,
err |= __put_user(OR_R0_R0, &frame->retcode[6]);
err |= __put_user((__NR_sigreturn), &frame->retcode[7]);
regs->pr = (unsigned long) frame->retcode;
flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode));
}
if (err)
@ -378,18 +384,21 @@ static int setup_frame(int sig, struct k_sigaction *ka,
regs->regs[4] = signal; /* Arg for signal handler */
regs->regs[5] = 0;
regs->regs[6] = (unsigned long) &frame->sc;
regs->pc = (unsigned long) ka->sa.sa_handler;
if (current->personality & FDPIC_FUNCPTRS) {
struct fdpic_func_descriptor __user *funcptr =
(struct fdpic_func_descriptor __user *)ka->sa.sa_handler;
__get_user(regs->pc, &funcptr->text);
__get_user(regs->regs[12], &funcptr->GOT);
} else
regs->pc = (unsigned long)ka->sa.sa_handler;
set_fs(USER_DS);
pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
current->comm, task_pid_nr(current), frame, regs->pc, regs->pr);
flush_cache_sigtramp(regs->pr);
if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode))
flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES);
return 0;
give_sigsegv:
@ -458,17 +467,22 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
regs->regs[4] = signal; /* Arg for signal handler */
regs->regs[5] = (unsigned long) &frame->info;
regs->regs[6] = (unsigned long) &frame->uc;
regs->pc = (unsigned long) ka->sa.sa_handler;
if (current->personality & FDPIC_FUNCPTRS) {
struct fdpic_func_descriptor __user *funcptr =
(struct fdpic_func_descriptor __user *)ka->sa.sa_handler;
__get_user(regs->pc, &funcptr->text);
__get_user(regs->regs[12], &funcptr->GOT);
} else
regs->pc = (unsigned long)ka->sa.sa_handler;
set_fs(USER_DS);
pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
current->comm, task_pid_nr(current), frame, regs->pc, regs->pr);
flush_cache_sigtramp(regs->pr);
if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode))
flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES);
flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode));
return 0;

View file

@ -343,3 +343,9 @@ ENTRY(sys_call_table)
.long sys_fallocate
.long sys_timerfd_settime /* 325 */
.long sys_timerfd_gettime
.long sys_signalfd4
.long sys_eventfd2
.long sys_epoll_create1
.long sys_dup3 /* 330 */
.long sys_pipe2
.long sys_inotify_init1

View file

@ -381,3 +381,9 @@ sys_call_table:
.long sys_fallocate
.long sys_timerfd_settime
.long sys_timerfd_gettime
.long sys_signalfd4 /* 355 */
.long sys_eventfd2
.long sys_epoll_create1
.long sys_dup3
.long sys_pipe2
.long sys_inotify_init1 /* 360 */

View file

@ -211,7 +211,7 @@ unsigned long sh_hpt_frequency = 0;
#define NSEC_PER_CYC_SHIFT 10
struct clocksource clocksource_sh = {
static struct clocksource clocksource_sh = {
.name = "SuperH",
.rating = 200,
.mask = CLOCKSOURCE_MASK(32),

View file

@ -209,7 +209,7 @@ static int tmu_timer_init(void)
return 0;
}
struct sys_timer_ops tmu_timer_ops = {
static struct sys_timer_ops tmu_timer_ops = {
.init = tmu_timer_init,
.start = tmu_timer_start,
.stop = tmu_timer_stop,

View file

@ -43,6 +43,7 @@
# define TRAP_ILLEGAL_SLOT_INST 6
# define TRAP_ADDRESS_ERROR 9
# ifdef CONFIG_CPU_SH2A
# define TRAP_FPU_ERROR 13
# define TRAP_DIVZERO_ERROR 17
# define TRAP_DIVOVF_ERROR 18
# endif
@ -851,6 +852,9 @@ void __init trap_init(void)
#ifdef CONFIG_CPU_SH2A
set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
#ifdef CONFIG_SH_FPU
set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler);
#endif
#endif
/* Setup VBR for boot cpu */

View file

@ -2,9 +2,11 @@
# Makefile for SuperH-specific library files..
#
lib-y = delay.o io.o memset.o memmove.o memchr.o \
lib-y = delay.o memset.o memmove.o memchr.o \
checksum.o strlen.o div64.o div64-generic.o
obj-y += io.o
memcpy-y := memcpy.o
memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o

View file

@ -145,25 +145,39 @@ choice
config PAGE_SIZE_4KB
bool "4kB"
depends on !X2TLB
depends on !MMU || !X2TLB
help
This is the default page size used by all SuperH CPUs.
config PAGE_SIZE_8KB
bool "8kB"
depends on X2TLB
depends on !MMU || X2TLB
help
This enables 8kB pages as supported by SH-X2 and later MMUs.
config PAGE_SIZE_16KB
bool "16kB"
depends on !MMU
help
This enables 16kB pages on MMU-less SH systems.
config PAGE_SIZE_64KB
bool "64kB"
depends on CPU_SH4 || CPU_SH5
depends on !MMU || CPU_SH4 || CPU_SH5
help
This enables support for 64kB pages, possible on all SH-4
CPUs and later.
endchoice
config ENTRY_OFFSET
hex
default "0x00001000" if PAGE_SIZE_4KB
default "0x00002000" if PAGE_SIZE_8KB
default "0x00004000" if PAGE_SIZE_16KB
default "0x00010000" if PAGE_SIZE_64KB
default "0x00000000"
choice
prompt "HugeTLB page size"
depends on HUGETLB_PAGE && (CPU_SH4 || CPU_SH5) && MMU

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