Merge branch 'remotes/lorenzo/pci/mediatek-gen3'
- Disable Mediatek DVFSRC voltage request since lack of DVFSRC to respond to the request causes failure to exit L1 PM Substate (Jianjun Wang) * remotes/lorenzo/pci/mediatek-gen3: PCI: mediatek-gen3: Disable DVFSRC voltage request
This commit is contained in:
commit
96fe579384
1 changed files with 8 additions and 0 deletions
|
@ -79,6 +79,9 @@
|
|||
#define PCIE_ICMD_PM_REG 0x198
|
||||
#define PCIE_TURN_OFF_LINK BIT(4)
|
||||
|
||||
#define PCIE_MISC_CTRL_REG 0x348
|
||||
#define PCIE_DISABLE_DVFSRC_VLT_REQ BIT(1)
|
||||
|
||||
#define PCIE_TRANS_TABLE_BASE_REG 0x800
|
||||
#define PCIE_ATR_SRC_ADDR_MSB_OFFSET 0x4
|
||||
#define PCIE_ATR_TRSL_ADDR_LSB_OFFSET 0x8
|
||||
|
@ -297,6 +300,11 @@ static int mtk_pcie_startup_port(struct mtk_pcie_port *port)
|
|||
val &= ~PCIE_INTX_ENABLE;
|
||||
writel_relaxed(val, port->base + PCIE_INT_ENABLE_REG);
|
||||
|
||||
/* Disable DVFSRC voltage request */
|
||||
val = readl_relaxed(port->base + PCIE_MISC_CTRL_REG);
|
||||
val |= PCIE_DISABLE_DVFSRC_VLT_REQ;
|
||||
writel_relaxed(val, port->base + PCIE_MISC_CTRL_REG);
|
||||
|
||||
/* Assert all reset signals */
|
||||
val = readl_relaxed(port->base + PCIE_RST_CTRL_REG);
|
||||
val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB;
|
||||
|
|
Loading…
Reference in a new issue