Merge branches 'acpi-pmic', 'acpi-apei' and 'acpi-x86'

* acpi-pmic:
  ACPI / PMIC: Add TI PMIC TPS68470 operation region driver

* acpi-apei:
  APEI / ERST: use 64-bit timestamps
  ACPI / APEI: Remove arch_apei_flush_tlb_one()
  arm64: mm: Remove arch_apei_flush_tlb_one()
  ACPI / APEI: Remove ghes_ioremap_area
  ACPI / APEI: Replace ioremap_page_range() with fixmap
  ACPI / APEI: remove the unused dead-code for SEA/NMI notification type
  ACPI / APEI: adjust a local variable type in ghes_ioremap_pfn_irq()

* acpi-x86:
  ACPI / x86: Extend KIOX000A quirk to cover all affected BIOS versions
This commit is contained in:
Rafael J. Wysocki 2017-11-13 01:37:17 +01:00
commit 85595ada6c
12 changed files with 530 additions and 115 deletions

View file

@ -126,18 +126,6 @@ static inline const char *acpi_get_enable_method(int cpu)
*/
#define acpi_disable_cmcff 1
pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
/*
* Despite its name, this function must still broadcast the TLB
* invalidation in order to ensure other CPUs don't end up with junk
* entries as a result of speculation. Unusually, its also called in
* IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
* TLB broadcasting, then we're in trouble here.
*/
static inline void arch_apei_flush_tlb_one(unsigned long addr)
{
flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
}
#endif /* CONFIG_ACPI_APEI */
#ifdef CONFIG_ACPI_NUMA

View file

@ -51,6 +51,13 @@ enum fixed_addresses {
FIX_EARLYCON_MEM_BASE,
FIX_TEXT_POKE0,
#ifdef CONFIG_ACPI_APEI_GHES
/* Used for GHES mapping from assorted contexts */
FIX_APEI_GHES_IRQ,
FIX_APEI_GHES_NMI,
#endif /* CONFIG_ACPI_APEI_GHES */
__end_of_permanent_fixed_addresses,
/*

View file

@ -778,6 +778,10 @@ void __init early_fixmap_init(void)
}
}
/*
* Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we
* ever need to use IPIs for TLB broadcasting, then we're in trouble here.
*/
void __set_fixmap(enum fixed_addresses idx,
phys_addr_t phys, pgprot_t flags)
{

View file

@ -104,6 +104,12 @@ enum fixed_addresses {
FIX_GDT_REMAP_BEGIN,
FIX_GDT_REMAP_END = FIX_GDT_REMAP_BEGIN + NR_CPUS - 1,
#ifdef CONFIG_ACPI_APEI_GHES
/* Used for GHES mapping from assorted contexts */
FIX_APEI_GHES_IRQ,
FIX_APEI_GHES_NMI,
#endif
__end_of_permanent_fixed_addresses,
/*

View file

@ -52,8 +52,3 @@ void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
apei_mce_report_mem_error(sev, mem_err);
#endif
}
void arch_apei_flush_tlb_one(unsigned long addr)
{
__flush_tlb_one(addr);
}

View file

@ -536,4 +536,20 @@ if ARM64
source "drivers/acpi/arm64/Kconfig"
endif
config TPS68470_PMIC_OPREGION
bool "ACPI operation region support for TPS68470 PMIC"
depends on MFD_TPS68470
help
This config adds ACPI operation region support for TI TPS68470 PMIC.
TPS68470 device is an advanced power management unit that powers
a Compact Camera Module (CCM), generates clocks for image sensors,
drives a dual LED for flash and incorporates two LED drivers for
general purpose indicators.
This driver enables ACPI operation region support control voltage
regulators and clocks.
This option is a bool as it provides an ACPI operation
region, which must be available before any of the devices
using this, are probed.
endif # ACPI

View file

@ -108,6 +108,8 @@ obj-$(CONFIG_CHT_WC_PMIC_OPREGION) += pmic/intel_pmic_chtwc.o
obj-$(CONFIG_ACPI_CONFIGFS) += acpi_configfs.o
obj-$(CONFIG_TPS68470_PMIC_OPREGION) += pmic/tps68470_pmic.o
video-objs += acpi_video.o video_detect.o
obj-y += dptf/

View file

@ -1061,7 +1061,7 @@ static int erst_writer(struct pstore_record *record)
rcd->hdr.error_severity = CPER_SEV_FATAL;
/* timestamp valid. platform_id, partition_id are invalid */
rcd->hdr.validation_bits = CPER_VALID_TIMESTAMP;
rcd->hdr.timestamp = get_seconds();
rcd->hdr.timestamp = ktime_get_real_seconds();
rcd->hdr.record_length = sizeof(*rcd) + record->size;
rcd->hdr.creator_id = CPER_CREATOR_PSTORE;
rcd->hdr.notification_type = CPER_NOTIFY_MCE;

View file

@ -51,6 +51,7 @@
#include <acpi/actbl1.h>
#include <acpi/ghes.h>
#include <acpi/apei.h>
#include <asm/fixmap.h>
#include <asm/tlbflush.h>
#include <ras/ras_event.h>
@ -112,22 +113,10 @@ static DEFINE_MUTEX(ghes_list_mutex);
* Because the memory area used to transfer hardware error information
* from BIOS to Linux can be determined only in NMI, IRQ or timer
* handler, but general ioremap can not be used in atomic context, so
* a special version of atomic ioremap is implemented for that.
*/
/*
* Two virtual pages are used, one for IRQ/PROCESS context, the other for
* NMI context (optionally).
*/
#define GHES_IOREMAP_PAGES 2
#define GHES_IOREMAP_IRQ_PAGE(base) (base)
#define GHES_IOREMAP_NMI_PAGE(base) ((base) + PAGE_SIZE)
/* virtual memory area for atomic ioremap */
static struct vm_struct *ghes_ioremap_area;
/*
* These 2 spinlock is used to prevent atomic ioremap virtual memory
* area from being mapped simultaneously.
* the fixmap is used instead.
*
* These 2 spinlocks are used to prevent the fixmap entries from being used
* simultaneously.
*/
static DEFINE_RAW_SPINLOCK(ghes_ioremap_lock_nmi);
static DEFINE_SPINLOCK(ghes_ioremap_lock_irq);
@ -140,71 +129,38 @@ static atomic_t ghes_estatus_cache_alloced;
static int ghes_panic_timeout __read_mostly = 30;
static int ghes_ioremap_init(void)
{
ghes_ioremap_area = __get_vm_area(PAGE_SIZE * GHES_IOREMAP_PAGES,
VM_IOREMAP, VMALLOC_START, VMALLOC_END);
if (!ghes_ioremap_area) {
pr_err(GHES_PFX "Failed to allocate virtual memory area for atomic ioremap.\n");
return -ENOMEM;
}
return 0;
}
static void ghes_ioremap_exit(void)
{
free_vm_area(ghes_ioremap_area);
}
static void __iomem *ghes_ioremap_pfn_nmi(u64 pfn)
{
unsigned long vaddr;
phys_addr_t paddr;
pgprot_t prot;
vaddr = (unsigned long)GHES_IOREMAP_NMI_PAGE(ghes_ioremap_area->addr);
paddr = pfn << PAGE_SHIFT;
prot = arch_apei_get_mem_attribute(paddr);
ioremap_page_range(vaddr, vaddr + PAGE_SIZE, paddr, prot);
__set_fixmap(FIX_APEI_GHES_NMI, paddr, prot);
return (void __iomem *)vaddr;
return (void __iomem *) fix_to_virt(FIX_APEI_GHES_NMI);
}
static void __iomem *ghes_ioremap_pfn_irq(u64 pfn)
{
unsigned long vaddr, paddr;
phys_addr_t paddr;
pgprot_t prot;
vaddr = (unsigned long)GHES_IOREMAP_IRQ_PAGE(ghes_ioremap_area->addr);
paddr = pfn << PAGE_SHIFT;
prot = arch_apei_get_mem_attribute(paddr);
__set_fixmap(FIX_APEI_GHES_IRQ, paddr, prot);
ioremap_page_range(vaddr, vaddr + PAGE_SIZE, paddr, prot);
return (void __iomem *)vaddr;
return (void __iomem *) fix_to_virt(FIX_APEI_GHES_IRQ);
}
static void ghes_iounmap_nmi(void __iomem *vaddr_ptr)
static void ghes_iounmap_nmi(void)
{
unsigned long vaddr = (unsigned long __force)vaddr_ptr;
void *base = ghes_ioremap_area->addr;
BUG_ON(vaddr != (unsigned long)GHES_IOREMAP_NMI_PAGE(base));
unmap_kernel_range_noflush(vaddr, PAGE_SIZE);
arch_apei_flush_tlb_one(vaddr);
clear_fixmap(FIX_APEI_GHES_NMI);
}
static void ghes_iounmap_irq(void __iomem *vaddr_ptr)
static void ghes_iounmap_irq(void)
{
unsigned long vaddr = (unsigned long __force)vaddr_ptr;
void *base = ghes_ioremap_area->addr;
BUG_ON(vaddr != (unsigned long)GHES_IOREMAP_IRQ_PAGE(base));
unmap_kernel_range_noflush(vaddr, PAGE_SIZE);
arch_apei_flush_tlb_one(vaddr);
clear_fixmap(FIX_APEI_GHES_IRQ);
}
static int ghes_estatus_pool_init(void)
@ -360,10 +316,10 @@ static void ghes_copy_tofrom_phys(void *buffer, u64 paddr, u32 len,
paddr += trunk;
buffer += trunk;
if (in_nmi) {
ghes_iounmap_nmi(vaddr);
ghes_iounmap_nmi();
raw_spin_unlock(&ghes_ioremap_lock_nmi);
} else {
ghes_iounmap_irq(vaddr);
ghes_iounmap_irq();
spin_unlock_irqrestore(&ghes_ioremap_lock_irq, flags);
}
}
@ -851,17 +807,8 @@ static void ghes_sea_remove(struct ghes *ghes)
synchronize_rcu();
}
#else /* CONFIG_ACPI_APEI_SEA */
static inline void ghes_sea_add(struct ghes *ghes)
{
pr_err(GHES_PFX "ID: %d, trying to add SEA notification which is not supported\n",
ghes->generic->header.source_id);
}
static inline void ghes_sea_remove(struct ghes *ghes)
{
pr_err(GHES_PFX "ID: %d, trying to remove SEA notification which is not supported\n",
ghes->generic->header.source_id);
}
static inline void ghes_sea_add(struct ghes *ghes) { }
static inline void ghes_sea_remove(struct ghes *ghes) { }
#endif /* CONFIG_ACPI_APEI_SEA */
#ifdef CONFIG_HAVE_ACPI_APEI_NMI
@ -1063,23 +1010,9 @@ static void ghes_nmi_init_cxt(void)
init_irq_work(&ghes_proc_irq_work, ghes_proc_in_irq);
}
#else /* CONFIG_HAVE_ACPI_APEI_NMI */
static inline void ghes_nmi_add(struct ghes *ghes)
{
pr_err(GHES_PFX "ID: %d, trying to add NMI notification which is not supported!\n",
ghes->generic->header.source_id);
BUG();
}
static inline void ghes_nmi_remove(struct ghes *ghes)
{
pr_err(GHES_PFX "ID: %d, trying to remove NMI notification which is not supported!\n",
ghes->generic->header.source_id);
BUG();
}
static inline void ghes_nmi_init_cxt(void)
{
}
static inline void ghes_nmi_add(struct ghes *ghes) { }
static inline void ghes_nmi_remove(struct ghes *ghes) { }
static inline void ghes_nmi_init_cxt(void) { }
#endif /* CONFIG_HAVE_ACPI_APEI_NMI */
static int ghes_probe(struct platform_device *ghes_dev)
@ -1285,13 +1218,9 @@ static int __init ghes_init(void)
ghes_nmi_init_cxt();
rc = ghes_ioremap_init();
if (rc)
goto err;
rc = ghes_estatus_pool_init();
if (rc)
goto err_ioremap_exit;
goto err;
rc = ghes_estatus_pool_expand(GHES_ESTATUS_CACHE_AVG_SIZE *
GHES_ESTATUS_CACHE_ALLOCED_MAX);
@ -1315,8 +1244,6 @@ static int __init ghes_init(void)
return 0;
err_pool_exit:
ghes_estatus_pool_exit();
err_ioremap_exit:
ghes_ioremap_exit();
err:
return rc;
}

View file

@ -0,0 +1,455 @@
/*
* TI TPS68470 PMIC operation region driver
*
* Copyright (C) 2017 Intel Corporation. All rights reserved.
*
* Author: Rajmohan Mani <rajmohan.mani@intel.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Based on drivers/acpi/pmic/intel_pmic* drivers
*/
#include <linux/acpi.h>
#include <linux/mfd/tps68470.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
struct tps68470_pmic_table {
u32 address; /* operation region address */
u32 reg; /* corresponding register */
u32 bitmask; /* bit mask for power, clock */
};
#define TI_PMIC_POWER_OPREGION_ID 0xB0
#define TI_PMIC_VR_VAL_OPREGION_ID 0xB1
#define TI_PMIC_CLOCK_OPREGION_ID 0xB2
#define TI_PMIC_CLKFREQ_OPREGION_ID 0xB3
struct tps68470_pmic_opregion {
struct mutex lock;
struct regmap *regmap;
};
#define S_IO_I2C_EN (BIT(0) | BIT(1))
static const struct tps68470_pmic_table power_table[] = {
{
.address = 0x00,
.reg = TPS68470_REG_S_I2C_CTL,
.bitmask = S_IO_I2C_EN,
/* S_I2C_CTL */
},
{
.address = 0x04,
.reg = TPS68470_REG_VCMCTL,
.bitmask = BIT(0),
/* VCMCTL */
},
{
.address = 0x08,
.reg = TPS68470_REG_VAUX1CTL,
.bitmask = BIT(0),
/* VAUX1_CTL */
},
{
.address = 0x0C,
.reg = TPS68470_REG_VAUX2CTL,
.bitmask = BIT(0),
/* VAUX2CTL */
},
{
.address = 0x10,
.reg = TPS68470_REG_VACTL,
.bitmask = BIT(0),
/* VACTL */
},
{
.address = 0x14,
.reg = TPS68470_REG_VDCTL,
.bitmask = BIT(0),
/* VDCTL */
},
};
/* Table to set voltage regulator value */
static const struct tps68470_pmic_table vr_val_table[] = {
{
.address = 0x00,
.reg = TPS68470_REG_VSIOVAL,
.bitmask = TPS68470_VSIOVAL_IOVOLT_MASK,
/* TPS68470_REG_VSIOVAL */
},
{
.address = 0x04,
.reg = TPS68470_REG_VIOVAL,
.bitmask = TPS68470_VIOVAL_IOVOLT_MASK,
/* TPS68470_REG_VIOVAL */
},
{
.address = 0x08,
.reg = TPS68470_REG_VCMVAL,
.bitmask = TPS68470_VCMVAL_VCVOLT_MASK,
/* TPS68470_REG_VCMVAL */
},
{
.address = 0x0C,
.reg = TPS68470_REG_VAUX1VAL,
.bitmask = TPS68470_VAUX1VAL_AUX1VOLT_MASK,
/* TPS68470_REG_VAUX1VAL */
},
{
.address = 0x10,
.reg = TPS68470_REG_VAUX2VAL,
.bitmask = TPS68470_VAUX2VAL_AUX2VOLT_MASK,
/* TPS68470_REG_VAUX2VAL */
},
{
.address = 0x14,
.reg = TPS68470_REG_VAVAL,
.bitmask = TPS68470_VAVAL_AVOLT_MASK,
/* TPS68470_REG_VAVAL */
},
{
.address = 0x18,
.reg = TPS68470_REG_VDVAL,
.bitmask = TPS68470_VDVAL_DVOLT_MASK,
/* TPS68470_REG_VDVAL */
},
};
/* Table to configure clock frequency */
static const struct tps68470_pmic_table clk_freq_table[] = {
{
.address = 0x00,
.reg = TPS68470_REG_POSTDIV2,
.bitmask = BIT(0) | BIT(1),
/* TPS68470_REG_POSTDIV2 */
},
{
.address = 0x04,
.reg = TPS68470_REG_BOOSTDIV,
.bitmask = 0x1F,
/* TPS68470_REG_BOOSTDIV */
},
{
.address = 0x08,
.reg = TPS68470_REG_BUCKDIV,
.bitmask = 0x0F,
/* TPS68470_REG_BUCKDIV */
},
{
.address = 0x0C,
.reg = TPS68470_REG_PLLSWR,
.bitmask = 0x13,
/* TPS68470_REG_PLLSWR */
},
{
.address = 0x10,
.reg = TPS68470_REG_XTALDIV,
.bitmask = 0xFF,
/* TPS68470_REG_XTALDIV */
},
{
.address = 0x14,
.reg = TPS68470_REG_PLLDIV,
.bitmask = 0xFF,
/* TPS68470_REG_PLLDIV */
},
{
.address = 0x18,
.reg = TPS68470_REG_POSTDIV,
.bitmask = 0x83,
/* TPS68470_REG_POSTDIV */
},
};
/* Table to configure and enable clocks */
static const struct tps68470_pmic_table clk_table[] = {
{
.address = 0x00,
.reg = TPS68470_REG_PLLCTL,
.bitmask = 0xF5,
/* TPS68470_REG_PLLCTL */
},
{
.address = 0x04,
.reg = TPS68470_REG_PLLCTL2,
.bitmask = BIT(0),
/* TPS68470_REG_PLLCTL2 */
},
{
.address = 0x08,
.reg = TPS68470_REG_CLKCFG1,
.bitmask = TPS68470_CLKCFG1_MODE_A_MASK |
TPS68470_CLKCFG1_MODE_B_MASK,
/* TPS68470_REG_CLKCFG1 */
},
{
.address = 0x0C,
.reg = TPS68470_REG_CLKCFG2,
.bitmask = TPS68470_CLKCFG1_MODE_A_MASK |
TPS68470_CLKCFG1_MODE_B_MASK,
/* TPS68470_REG_CLKCFG2 */
},
};
static int pmic_get_reg_bit(u64 address,
const struct tps68470_pmic_table *table,
const unsigned int table_size, int *reg,
int *bitmask)
{
u64 i;
i = address / 4;
if (i >= table_size)
return -ENOENT;
if (!reg || !bitmask)
return -EINVAL;
*reg = table[i].reg;
*bitmask = table[i].bitmask;
return 0;
}
static int tps68470_pmic_get_power(struct regmap *regmap, int reg,
int bitmask, u64 *value)
{
unsigned int data;
if (regmap_read(regmap, reg, &data))
return -EIO;
*value = (data & bitmask) ? 1 : 0;
return 0;
}
static int tps68470_pmic_get_vr_val(struct regmap *regmap, int reg,
int bitmask, u64 *value)
{
unsigned int data;
if (regmap_read(regmap, reg, &data))
return -EIO;
*value = data & bitmask;
return 0;
}
static int tps68470_pmic_get_clk(struct regmap *regmap, int reg,
int bitmask, u64 *value)
{
unsigned int data;
if (regmap_read(regmap, reg, &data))
return -EIO;
*value = (data & bitmask) ? 1 : 0;
return 0;
}
static int tps68470_pmic_get_clk_freq(struct regmap *regmap, int reg,
int bitmask, u64 *value)
{
unsigned int data;
if (regmap_read(regmap, reg, &data))
return -EIO;
*value = data & bitmask;
return 0;
}
static int ti_tps68470_regmap_update_bits(struct regmap *regmap, int reg,
int bitmask, u64 value)
{
return regmap_update_bits(regmap, reg, bitmask, value);
}
static acpi_status tps68470_pmic_common_handler(u32 function,
acpi_physical_address address,
u32 bits, u64 *value,
void *region_context,
int (*get)(struct regmap *,
int, int, u64 *),
int (*update)(struct regmap *,
int, int, u64),
const struct tps68470_pmic_table *tbl,
unsigned int tbl_size)
{
struct tps68470_pmic_opregion *opregion = region_context;
struct regmap *regmap = opregion->regmap;
int reg, ret, bitmask;
if (bits != 32)
return AE_BAD_PARAMETER;
ret = pmic_get_reg_bit(address, tbl, tbl_size, &reg, &bitmask);
if (ret < 0)
return AE_BAD_PARAMETER;
if (function == ACPI_WRITE && *value > bitmask)
return AE_BAD_PARAMETER;
mutex_lock(&opregion->lock);
ret = (function == ACPI_READ) ?
get(regmap, reg, bitmask, value) :
update(regmap, reg, bitmask, *value);
mutex_unlock(&opregion->lock);
return ret ? AE_ERROR : AE_OK;
}
static acpi_status tps68470_pmic_cfreq_handler(u32 function,
acpi_physical_address address,
u32 bits, u64 *value,
void *handler_context,
void *region_context)
{
return tps68470_pmic_common_handler(function, address, bits, value,
region_context,
tps68470_pmic_get_clk_freq,
ti_tps68470_regmap_update_bits,
clk_freq_table,
ARRAY_SIZE(clk_freq_table));
}
static acpi_status tps68470_pmic_clk_handler(u32 function,
acpi_physical_address address, u32 bits,
u64 *value, void *handler_context,
void *region_context)
{
return tps68470_pmic_common_handler(function, address, bits, value,
region_context,
tps68470_pmic_get_clk,
ti_tps68470_regmap_update_bits,
clk_table,
ARRAY_SIZE(clk_table));
}
static acpi_status tps68470_pmic_vrval_handler(u32 function,
acpi_physical_address address,
u32 bits, u64 *value,
void *handler_context,
void *region_context)
{
return tps68470_pmic_common_handler(function, address, bits, value,
region_context,
tps68470_pmic_get_vr_val,
ti_tps68470_regmap_update_bits,
vr_val_table,
ARRAY_SIZE(vr_val_table));
}
static acpi_status tps68470_pmic_pwr_handler(u32 function,
acpi_physical_address address,
u32 bits, u64 *value,
void *handler_context,
void *region_context)
{
if (bits != 32)
return AE_BAD_PARAMETER;
/* set/clear for bit 0, bits 0 and 1 together */
if (function == ACPI_WRITE &&
!(*value == 0 || *value == 1 || *value == 3)) {
return AE_BAD_PARAMETER;
}
return tps68470_pmic_common_handler(function, address, bits, value,
region_context,
tps68470_pmic_get_power,
ti_tps68470_regmap_update_bits,
power_table,
ARRAY_SIZE(power_table));
}
static int tps68470_pmic_opregion_probe(struct platform_device *pdev)
{
struct regmap *tps68470_regmap = dev_get_drvdata(pdev->dev.parent);
acpi_handle handle = ACPI_HANDLE(pdev->dev.parent);
struct device *dev = &pdev->dev;
struct tps68470_pmic_opregion *opregion;
acpi_status status;
if (!dev || !tps68470_regmap) {
dev_warn(dev, "dev or regmap is NULL\n");
return -EINVAL;
}
if (!handle) {
dev_warn(dev, "acpi handle is NULL\n");
return -ENODEV;
}
opregion = devm_kzalloc(dev, sizeof(*opregion), GFP_KERNEL);
if (!opregion)
return -ENOMEM;
mutex_init(&opregion->lock);
opregion->regmap = tps68470_regmap;
status = acpi_install_address_space_handler(handle,
TI_PMIC_POWER_OPREGION_ID,
tps68470_pmic_pwr_handler,
NULL, opregion);
if (ACPI_FAILURE(status))
goto out_mutex_destroy;
status = acpi_install_address_space_handler(handle,
TI_PMIC_VR_VAL_OPREGION_ID,
tps68470_pmic_vrval_handler,
NULL, opregion);
if (ACPI_FAILURE(status))
goto out_remove_power_handler;
status = acpi_install_address_space_handler(handle,
TI_PMIC_CLOCK_OPREGION_ID,
tps68470_pmic_clk_handler,
NULL, opregion);
if (ACPI_FAILURE(status))
goto out_remove_vr_val_handler;
status = acpi_install_address_space_handler(handle,
TI_PMIC_CLKFREQ_OPREGION_ID,
tps68470_pmic_cfreq_handler,
NULL, opregion);
if (ACPI_FAILURE(status))
goto out_remove_clk_handler;
return 0;
out_remove_clk_handler:
acpi_remove_address_space_handler(handle, TI_PMIC_CLOCK_OPREGION_ID,
tps68470_pmic_clk_handler);
out_remove_vr_val_handler:
acpi_remove_address_space_handler(handle, TI_PMIC_VR_VAL_OPREGION_ID,
tps68470_pmic_vrval_handler);
out_remove_power_handler:
acpi_remove_address_space_handler(handle, TI_PMIC_POWER_OPREGION_ID,
tps68470_pmic_pwr_handler);
out_mutex_destroy:
mutex_destroy(&opregion->lock);
return -ENODEV;
}
static struct platform_driver tps68470_pmic_opregion_driver = {
.probe = tps68470_pmic_opregion_probe,
.driver = {
.name = "tps68470_pmic_opregion",
},
};
builtin_platform_driver(tps68470_pmic_opregion_driver)

View file

@ -71,18 +71,34 @@ static const struct always_present_id always_present_ids[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7130"),
}),
/*
* The GPD win BIOS dated 20170320 has disabled the accelerometer, the
* The GPD win BIOS dated 20170221 has disabled the accelerometer, the
* drivers sometimes cause crashes under Windows and this is how the
* manufacturer has solved this :| Note that the the DMI data is less
* generic then it seems, a board_vendor of "AMI Corporation" is quite
* rare and a board_name of "Default String" also is rare.
*
* Unfortunately the GPD pocket also uses these strings and its BIOS
* was copy-pasted from the GPD win, so it has a disabled KIOX000A
* node which we should not enable, thus we also check the BIOS date.
*/
ENTRY("KIOX000A", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {
DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
DMI_MATCH(DMI_BOARD_NAME, "Default string"),
DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
DMI_MATCH(DMI_BIOS_DATE, "02/21/2017")
}),
ENTRY("KIOX000A", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {
DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
DMI_MATCH(DMI_BOARD_NAME, "Default string"),
DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
DMI_MATCH(DMI_BIOS_DATE, "03/20/2017")
}),
ENTRY("KIOX000A", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {
DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
DMI_MATCH(DMI_BOARD_NAME, "Default string"),
DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
DMI_MATCH(DMI_BIOS_DATE, "05/25/2017")
}),
};
bool acpi_device_always_present(struct acpi_device *adev)

View file

@ -51,7 +51,6 @@ int erst_clear(u64 record_id);
int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data);
void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err);
void arch_apei_flush_tlb_one(unsigned long addr);
#endif
#endif