Second Round of Renesas ARM Based SoC Fixes for v3.19

* Instantiate GIC from C board code in legacy builds on r8a7778 and r8a7779
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUvax/AAoJENfPZGlqN0++7d4P/ic/OC82lPZuhmqCzdE03ptb
 8wvQNiQdHHA1q1hVZPC4cVGDqIymv9Si5q8AliPT5hqT2iSZIUjlTPe4WO350zSl
 qZZoAM4Qk6DzxFNw6I/+j7HcR9NEzCBpfCEkNH7peXzmrlGnAdBPKY0Lw9wf47a/
 uh4xwaKsi7583AN2m1NB9jYESUNXyP/lWEsA+goUqIZTudJLpcvML6y96nHJ9JEv
 5MXFAwVVDJ+huz6Q8hG3ImviUihiIWX25oQ2pmhFczPIf+RDHWDMhQd5Xp/5VBVn
 +3ckUFjXgzhYp5BvPvFhrU46nHolGALDbEIOGgMZwM8GRIA9ffAttK3j4Du1ixa3
 XDrNCbfOCeXfRAr+HcTHdwUtKcJxVz9oVZmlOMzc6yZfrAR0Y5dz3M8iUa2tqFqK
 +DUGstqm26rSwDVGkY7vElRz5nnQhb0/yWpUrO2Augsh04e28V5SkFiIHRFWJ/uT
 53h8qbqyDChw9ZVqg0Na01N0aVRa5a1XpYqtAEs+ta+y3/A35NVBToXhVh3aOQUt
 qAdFrwykyR32bMR0vUg8XVLm2rcaV87D6MDKGElKlkTxPoDK9+RPzfiu0sK4fmfV
 TULb9izepRRfJLDWTeDJm3uxbt1qaOVc1ry24R4HvDsC48BmfuZEVedIn9+Mp+SW
 xhrHiW1bUa3NL/p2BuPX
 =Mb4f
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-fixes2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Merge "Second Round of Renesas ARM Based SoC Fixes for v3.19" from Simon
Horman:

* Instantiate GIC from C board code in legacy builds on r8a7778 and r8a7779

* tag 'renesas-soc-fixes2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7779: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a7778: Instantiate GIC from C board code in legacy builds

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-01-21 17:15:49 -08:00
commit 604beee864
2 changed files with 16 additions and 2 deletions

View file

@ -576,11 +576,18 @@ void __init r8a7778_init_irq_extpin(int irlm)
void __init r8a7778_init_irq_dt(void)
{
void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
void __iomem *gic_dist_base = ioremap_nocache(0xfe438000, 0x1000);
void __iomem *gic_cpu_base = ioremap_nocache(0xfe430000, 0x1000);
#endif
BUG_ON(!base);
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
gic_init(0, 29, gic_dist_base, gic_cpu_base);
#else
irqchip_init();
#endif
/* route all interrupts to ARM */
__raw_writel(0x73ffffff, base + INT2NTSR0);
__raw_writel(0xffffffff, base + INT2NTSR1);

View file

@ -720,10 +720,17 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
void __init r8a7779_init_irq_dt(void)
{
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
void __iomem *gic_dist_base = ioremap_nocache(0xf0001000, 0x1000);
void __iomem *gic_cpu_base = ioremap_nocache(0xf0000100, 0x1000);
#endif
gic_arch_extn.irq_set_wake = r8a7779_set_wake;
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
gic_init(0, 29, gic_dist_base, gic_cpu_base);
#else
irqchip_init();
#endif
/* route all interrupts to ARM */
__raw_writel(0xffffffff, INT2NTSR0);
__raw_writel(0x3fffffff, INT2NTSR1);