iommu/vt-d: Unconditionally flush device TLB for pasid table updates
[ Upstream commit 1f5e307ca16c0c19186cbd56ac460a687e6daba0 ] The caching mode of an IOMMU is irrelevant to the behavior of the device TLB. Previously, commit <304b3bde24b5> ("iommu/vt-d: Remove caching mode check before device TLB flush") removed this redundant check in the domain unmap path. Checking the caching mode before flushing the device TLB after a pasid table entry is updated is unnecessary and can lead to inconsistent behavior. Extends this consistency by removing the caching mode check in the pasid table update path. Suggested-by: Yi Liu <yi.l.liu@intel.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20240820030208.20020-1-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 3 additions and 9 deletions
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@ -264,9 +264,7 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
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else
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iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
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/* Device IOTLB doesn't need to be flushed in caching mode. */
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if (!cap_caching_mode(iommu->cap))
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devtlb_invalidation_with_pasid(iommu, dev, pasid);
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devtlb_invalidation_with_pasid(iommu, dev, pasid);
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}
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/*
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@ -493,9 +491,7 @@ int intel_pasid_setup_dirty_tracking(struct intel_iommu *iommu,
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iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
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/* Device IOTLB doesn't need to be flushed in caching mode. */
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if (!cap_caching_mode(iommu->cap))
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devtlb_invalidation_with_pasid(iommu, dev, pasid);
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devtlb_invalidation_with_pasid(iommu, dev, pasid);
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return 0;
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}
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@ -572,9 +568,7 @@ void intel_pasid_setup_page_snoop_control(struct intel_iommu *iommu,
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pasid_cache_invalidation_with_pasid(iommu, did, pasid);
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qi_flush_piotlb(iommu, did, pasid, 0, -1, 0);
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/* Device IOTLB doesn't need to be flushed in caching mode. */
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if (!cap_caching_mode(iommu->cap))
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devtlb_invalidation_with_pasid(iommu, dev, pasid);
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devtlb_invalidation_with_pasid(iommu, dev, pasid);
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}
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/**
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