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coresight: Updates for v6.4

Browse source 
This is a relatively smaller update for CoreSight tracing subsystem targeting
 v6.4, with the following changes:
 
   - Removing Mathieu Poirier as MAINTAINER for the subsystem, with updates to
     CREDITS for his contributions.
   - Fix CoreSight ETM PMU to set the module field
 
 Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
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Merge tag 'coresight-next-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next

Suzuki writes:

coresight: Updates for v6.4

This is a relatively smaller update for CoreSight tracing subsystem targeting
v6.4, with the following changes:

  - Removing Mathieu Poirier as MAINTAINER for the subsystem, with updates to
    CREDITS for his contributions.
  - Fix CoreSight ETM PMU to set the module field

Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>

* tag 'coresight-next-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux:
  coresight: etm_pmu: Set the module field
  MAINTAINERS: Remove Mathieu Poirier as coresight maintainer
This commit is contained in:
Greg Kroah-Hartman 2023-04-19 15:08:11 +02:00
commit 12124d1672
3 changed files with 6 additions and 1 deletions
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5
CREDITS
View file

@ -3459,6 +3459,11 @@ D: several improvements to system programs
S: Oldenburg
S: Germany
N: Mathieu Poirier
E: mathieu.poirier@linaro.org
D: CoreSight kernel subsystem, Maintainer 2014-2022
D: Perf tool support for CoreSight
N: Robert Schwebel
E: robert@schwebel.de
W: https://www.schwebel.de

1
MAINTAINERS
View file

@ -2099,7 +2099,6 @@ F: arch/arm/boot/dts/cx92755*
N: digicolor
ARM/CORESIGHT FRAMEWORK AND DRIVERS
M: Mathieu Poirier <mathieu.poirier@linaro.org>
M: Suzuki K Poulose <suzuki.poulose@arm.com>
R: Mike Leach <mike.leach@linaro.org>
R: Leo Yan <leo.yan@linaro.org>

1
drivers/hwtracing/coresight/coresight-etm-perf.c
View file

@ -901,6 +901,7 @@ int __init etm_perf_init(void)
etm_pmu.addr_filters_sync = etm_addr_filters_sync;
etm_pmu.addr_filters_validate = etm_addr_filters_validate;
etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
etm_pmu.module = THIS_MODULE;
ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
if (ret == 0)