Blaster4385/linux-IllusionX
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

x86: more header fixes

Browse source 
Summary: Add missing include guards for some x86 headers.

This has only had the most rudimentary testing, but is hopefully obviously
correct.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Vegard Nossum 2008-06-10 23:45:45 +02:00 committed by Ingo Molnar
parent e6e07d8a2d
commit 0db125c467
4 changed files with 16 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
include/asm-x86/seccomp_64.h
View file

@ -1,4 +1,5 @@
#ifndef _ASM_SECCOMP_H
#define _ASM_SECCOMP_H
#include <linux/thread_info.h>

5
include/asm-x86/suspend_32.h
View file

@ -3,6 +3,9 @@
* Based on code
* Copyright 2001 Patrick Mochel <mochel@osdl.org>
*/
#ifndef __ASM_X86_32_SUSPEND_H
#define __ASM_X86_32_SUSPEND_H
#include <asm/desc.h>
#include <asm/i387.h>
@ -44,3 +47,5 @@ static inline void acpi_save_register_state(unsigned long return_point)
/* routines for saving/restoring kernel state */
extern int acpi_save_state_mem(void);
#endif
#endif /* __ASM_X86_32_SUSPEND_H */

5
include/asm-x86/xor_32.h
View file

@ -1,3 +1,6 @@
#ifndef ASM_X86__XOR_32_H
#define ASM_X86__XOR_32_H
/*
* Optimized RAID-5 checksumming functions for MMX and SSE.
*
@ -881,3 +884,5 @@ do { \
deals with a load to a line that is being prefetched. */
#define XOR_SELECT_TEMPLATE(FASTEST) \
(cpu_has_xmm ? &xor_block_pIII_sse : FASTEST)
#endif /* ASM_X86__XOR_32_H */

5
include/asm-x86/xor_64.h
View file

@ -1,3 +1,6 @@
#ifndef ASM_X86__XOR_64_H
#define ASM_X86__XOR_64_H
/*
* Optimized RAID-5 checksumming functions for MMX and SSE.
*
@ -354,3 +357,5 @@ do { \
We may also be able to load into the L1 only depending on how the cpu
deals with a load to a line that is being prefetched. */
#define XOR_SELECT_TEMPLATE(FASTEST) (&xor_block_sse)
#endif /* ASM_X86__XOR_64_H */