128 lines
3 KiB
C
128 lines
3 KiB
C
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/*
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* Copyright 2004 James Cleverdon, IBM.
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* Subject to the GNU Public License, v.2
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*
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* Flat APIC subarch code. Maximum 8 CPUs, logical delivery.
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*
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* Hacked for x86-64 by James Cleverdon from i386 architecture code by
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* Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
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* James Cleverdon.
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*/
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#include <linux/config.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/ctype.h>
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#include <linux/init.h>
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#include <asm/smp.h>
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#include <asm/ipi.h>
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static cpumask_t flat_target_cpus(void)
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{
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return cpu_online_map;
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}
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/*
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* Set up the logical destination ID.
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*
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* Intel recommends to set DFR, LDR and TPR before enabling
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* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
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* document number 292116). So here it goes...
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*/
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static void flat_init_apic_ldr(void)
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{
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unsigned long val;
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unsigned long num, id;
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num = smp_processor_id();
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id = 1UL << num;
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x86_cpu_to_log_apicid[num] = id;
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apic_write_around(APIC_DFR, APIC_DFR_FLAT);
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val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
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val |= SET_APIC_LOGICAL_ID(id);
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apic_write_around(APIC_LDR, val);
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}
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static void flat_send_IPI_allbutself(int vector)
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{
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/*
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* if there are no other CPUs in the system then
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* we get an APIC send error if we try to broadcast.
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* thus we have to avoid sending IPIs in this case.
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*/
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if (num_online_cpus() > 1)
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__send_IPI_shortcut(APIC_DEST_ALLBUT, vector, APIC_DEST_LOGICAL);
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}
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static void flat_send_IPI_all(int vector)
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{
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__send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
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}
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static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
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{
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unsigned long mask = cpus_addr(cpumask)[0];
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unsigned long cfg;
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unsigned long flags;
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local_save_flags(flags);
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local_irq_disable();
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/*
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* Wait for idle.
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*/
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apic_wait_icr_idle();
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/*
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* prepare target chip field
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*/
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cfg = __prepare_ICR2(mask);
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apic_write_around(APIC_ICR2, cfg);
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/*
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* program the ICR
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*/
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cfg = __prepare_ICR(0, vector, APIC_DEST_LOGICAL);
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/*
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* Send the IPI. The write to APIC_ICR fires this off.
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*/
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apic_write_around(APIC_ICR, cfg);
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local_irq_restore(flags);
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}
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static int flat_apic_id_registered(void)
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{
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return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
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}
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static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask)
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{
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return cpus_addr(cpumask)[0] & APIC_ALL_CPUS;
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}
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static unsigned int phys_pkg_id(int index_msb)
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{
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u32 ebx;
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ebx = cpuid_ebx(1);
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return ((ebx >> 24) & 0xFF) >> index_msb;
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}
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struct genapic apic_flat = {
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.name = "flat",
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.int_delivery_mode = dest_LowestPrio,
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.int_dest_mode = (APIC_DEST_LOGICAL != 0),
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.int_delivery_dest = APIC_DEST_LOGICAL | APIC_DM_LOWEST,
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.target_cpus = flat_target_cpus,
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.apic_id_registered = flat_apic_id_registered,
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.init_apic_ldr = flat_init_apic_ldr,
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.send_IPI_all = flat_send_IPI_all,
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.send_IPI_allbutself = flat_send_IPI_allbutself,
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.send_IPI_mask = flat_send_IPI_mask,
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.cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
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.phys_pkg_id = phys_pkg_id,
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};
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