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MIF frequency optimization for 60fps video recording use-case

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This CL sets the MIF min clock frequency to 1539MHz, which based on
initial ODPM and MIPS measurements shows benefit both in terms of power
consumption and cycles-per-instructions (CPI), reducing the gap with R4
device.

L10 power and performance impact tests will update on the bug.

Bug: 239651545
Test: Build pass, GCA
Change-Id: I1b057f187e45bad46f4661bd5673f0f88aab3a93
This commit is contained in:
pointerkung 2022-07-18 18:18:56 +08:00 committed by TreeHugger Robot
parent 2d51ed1ffd
commit bedc610607
1 changed files with 2 additions and 1 deletions
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3
powerhint.json
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@ -5,6 +5,7 @@
"Path": "/sys/devices/platform/17000010.devfreq_mif/devfreq/17000010.devfreq_mif/min_freq",
"Values": [
"3172000",
"1539000",
"1014000",
"421000"
],
@ -940,7 +941,7 @@
"PowerHint": "CAMERA_STREAMING_HIGH",
"Node": "MemFreq",
"Duration": 0,
"Value": "1014000"
"Value": "1539000"
},
{
"PowerHint": "CAMERA_STREAMING_HIGH",